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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/89213] Optimize V2DI shifts by a constant on power8 & above systems.
Date: Wed, 18 Sep 2024 01:06:06 +0000	[thread overview]
Message-ID: <bug-89213-4-t9kodAkMCP@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-89213-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89213

--- Comment #9 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Michael Meissner <meissner@gcc.gnu.org>:

https://gcc.gnu.org/g:9a07ac151327f61963b092062eb8566dd0c6f0cd

commit r15-3676-g9a07ac151327f61963b092062eb8566dd0c6f0cd
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Sep 17 21:05:27 2024 -0400

    PR 89213: Add better support for shifting vectors with 64-bit elements

    This patch fixes PR target/89213 to allow better code to be generated to do
    constant shifts of V2DI/V2DF vectors.  Previously GCC would do constant
shifts
    of vectors with 64-bit elements by using:

            XXSPLTIB 32,4
            VEXTSB2D 0,0
            VSRAD 2,2,0

    I.e., the PowerPC does not have a VSPLTISD instruction to load -15..14 for
the
    64-bit shift count in one instruction.  Instead, it would need to load a
byte
    and then convert it to 64-bit.

    With this patch, GCC now realizes that the vector shift instructions will
look
    at the bottom 6 bits for the shift count, and it can use either a VSPLTISW
or
    XXSPLTIB instruction to load the shift count.

    2024-09-17  Michael Meissner  <meissner@linux.ibm.com>

    gcc/

            PR target/89213
            * config/rs6000/altivec.md (UNSPEC_VECTOR_SHIFT): New unspec.
            (VSHIFT_MODE): New mode iterator.
            (vshift_code): New code iterator.
            (vshift_attr): New code attribute.
            (altivec_<mode>_<vshift_attr>_const): New pattern to optimize
            vector long long/int shifts by a constant.
            (altivec_<mode>_shift_const): New helper insn to load up a
            constant used by the shift operation.
            * config/rs6000/predicates.md (vector_shift_constant): New
            predicate.

    gcc/testsuite/

            PR target/89213
            * gcc.target/powerpc/pr89213.c: New test.
            * gcc.target/powerpc/vec-rlmi-rlnm.c: Update instruction count.

      parent reply	other threads:[~2024-09-18  1:06 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <bug-89213-4@http.gcc.gnu.org/bugzilla/>
2024-08-12 21:45 ` meissner at gcc dot gnu.org
2024-08-12 21:57 ` meissner at gcc dot gnu.org
2024-09-18  1:06 ` cvs-commit at gcc dot gnu.org [this message]

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