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From: "segher at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/89310] Poor code generation returning float
 field from a struct
Date: Thu, 02 Jul 2020 23:12:41 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D89310

--- Comment #7 from luoxhu at gcc dot gnu.org ---
(In reply to Segher Boessenkool from comment #6)
> rldicr is one of the insns generated by "*rotl<mode>3_mask", which
> recognises all canonical formulations of all our rotate-and-mask
> instructions.

Yes, rldicr could also be generated by "and<mode>3_mask", for this case, I
suppose use and_di3_mask without shift right and left is enough? (Below is
minor change with hard code 0xFFFFFFFF00000000ULL replaced.)


   rtx mask =3D GEN_INT (HOST_WIDE_INT_M1U << 32);
   emit_insn (gen_anddi3 (tmp, op1, mask));
   emit_insn (gen_p8_mtvsrd_sf (op0, tmp));
   emit_insn (gen_vsx_xscvspdpn_directmove (op0, op0));
   DONE;

--- Comment #8 from Segher Boessenkool <segher at gcc dot gnu.org> ---
That looks good yes.=