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From: "luoxhu at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/89310] Poor code generation returning float field from a struct Date: Tue, 23 Jun 2020 01:29:13 +0000 [thread overview] Message-ID: <bug-89310-4-9JHQsUBLgc@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-89310-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89310 luoxhu at gcc dot gnu.org changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |luoxhu at gcc dot gnu.org --- Comment #3 from luoxhu at gcc dot gnu.org --- rs6000.md: (define_insn_and_split "movsf_from_si" ... "&& reload_completed && vsx_reg_sfsubreg_ok (operands[0], SFmode) && int_reg_operand_not_pseudo (operands[1], SImode)" [(const_int 0) ... /* Move SF value to upper 32-bits for xscvspdpn. */ emit_insn (gen_ashldi3 (op2, op1_di, GEN_INT (32))); emit_insn (gen_p8_mtvsrd_sf (op0, op2)); emit_insn (gen_vsx_xscvspdpn_directmove (op0, op0)); DONE The split seems inevitable as reload_completed is true here, can this lshrdi3+ashldi3 be optimized by peephole? r9 is DImode, is there any benefit of using mtvsrw[az] instead of mtvsrd? Or could we replace the 3 instructions with better sequence? Thanks.
next parent reply other threads:[~2020-06-23 1:29 UTC|newest] Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <bug-89310-4@http.gcc.gnu.org/bugzilla/> 2020-06-23 1:29 ` luoxhu at gcc dot gnu.org [this message] 2020-06-24 18:12 ` segher at gcc dot gnu.org 2020-06-28 9:56 ` luoxhu at gcc dot gnu.org 2020-06-29 17:46 ` segher at gcc dot gnu.org 2020-07-02 23:12 ` segher at gcc dot gnu.org 2020-07-21 3:37 ` cvs-commit at gcc dot gnu.org 2020-07-22 1:34 ` luoxhu at gcc dot gnu.org
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