From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id 23AA738983A5; Thu, 15 Dec 2022 19:20:07 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 23AA738983A5
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1671132007;
	bh=NB7F5EoDsd7X9HV0lDhVZwmzTsctsguk5AYeZsqHNJs=;
	h=From:To:Subject:Date:In-Reply-To:References:From;
	b=V2cCYWe0VlA6nHJEvpcZWHtinld14rEVfHI2RkI9pGpI9YpkIB/P6cVXECf4jwKcH
	 n6FsoRLQUVx9p8gfLO+jxmSYs+UEymoe/FZdvYWAYIRNPs1fzzpq//qmwZVuk9FCss
	 sVI1B6gChvFT7UYhxbUROPseV++z67pzj+wjHEQQ=
From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/90706] [10/11/12/13 Regression] Useless code
 generated for stack / register operations on AVR
Date: Thu, 15 Dec 2022 19:20:06 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: rtl-optimization
X-Bugzilla-Version: 9.1.0
X-Bugzilla-Keywords: missed-optimization, ra
X-Bugzilla-Severity: normal
X-Bugzilla-Who: cvs-commit at gcc dot gnu.org
X-Bugzilla-Status: NEW
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P4
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: 10.5
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: 
Message-ID: <bug-90706-4-AiZlmNFSD2@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-90706-4@http.gcc.gnu.org/bugzilla/>
References: <bug-90706-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D90706

--- Comment #15 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmakarov@gcc.gnu.or=
g>:

https://gcc.gnu.org/g:12abd5a7d13209f79664ea603b3f3517f71b8c4f

commit r13-4727-g12abd5a7d13209f79664ea603b3f3517f71b8c4f
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Thu Dec 15 14:11:05 2022 -0500

    IRA: Check that reg classes contain a hard reg of given mode in reg move
cost calculation

    IRA calculates wrong AVR costs for moving general hard regs of SFmode. =
 To
    calculate the costs we did not exclude sub-classes which do not contain
    hard regs of given mode.  This was the reason for spilling a pseudo in =
the
    PR. The patch fixes this.

            PR rtl-optimization/90706

    gcc/ChangeLog:

            * ira-costs.cc: Include print-rtl.h.
            (record_reg_classes, scan_one_insn): Add code to print debug in=
fo.
            * ira.cc (ira_init_register_move_cost): Check that at least one
hard
            reg of the mode are in the class contents to calculate the
            register move costs.

    gcc/testsuite/ChangeLog:

            * gcc.target/avr/pr90706.c: New.=