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Subject: [Bug middle-end/90773] Improve piecewise operation
Date: Mon, 02 Aug 2021 17:41:09 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D90773

--- Comment #11 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by H.J. Lu <hjl@gcc.gnu.org>:

https://gcc.gnu.org/g:1bee034e012d1146d34b0d767fe28a485c210e4b

commit r12-2664-g1bee034e012d1146d34b0d767fe28a485c210e4b
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Mon Aug 2 10:01:46 2021 -0700

    x86: Add TARGET_GEN_MEMSET_SCRATCH_RTX

    Define TARGET_GEN_MEMSET_SCRATCH_RTX to ix86_gen_scratch_sse_rtx to
    return a scratch SSE register for memset.

    gcc/

            PR middle-end/90773
            * config/i386/i386.c (TARGET_GEN_MEMSET_SCRATCH_RTX): New.

    gcc/testsuite/

            PR middle-end/90773
            * gcc.target/i386/pr90773-5.c: Updated to expect XMM register.
            * gcc.target/i386/pr90773-14.c: Likewise.
            * gcc.target/i386/pr90773-15.c: New test.
            * gcc.target/i386/pr90773-16.c: Likewise.
            * gcc.target/i386/pr90773-17.c: Likewise.
            * gcc.target/i386/pr90773-18.c: Likewise.
            * gcc.target/i386/pr90773-19.c: Likewise.=