[Bug target/91804] [10/11/12/13/14 regression] r265398 breaks gcc.target/powerpc/vec-rlmi-rlnm.c

["bergner at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91804

Peter Bergner <bergner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
                 CC|                            |pthaugen at gcc dot gnu.org
         Resolution|---                         |FIXED

--- Comment #9 from Peter Bergner <bergner at gcc dot gnu.org> ---
(In reply to Ajit Kumar Agarwal from comment #8)
> I don't see extra xxlor with latest gcc trunk. I think this is fixed.
> I think we should close this PR.

Thanks for looking Ajit.  I did a git bisect and it flagged a patch from Pat as
fixing this:

commit 51d89e61f7ebfe75ca752e62bd29b58cb957235c
Author:     Pat Haugen <pthaugen@linux.ibm.com>
AuthorDate: Mon May 10 13:49:06 2021 -0500
Commit:     Pat Haugen <pthaugen@linux.ibm.com>
CommitDate: Mon May 10 13:49:06 2021 -0500

    Add ALTIVEC_REGS as pressure class.

    Code that has heavy register pressure on Altivec registers can suffer from
    over-aggressive scheduling during sched1, which then leads to increased
    register spill. This is due to the fact that registers that prefer
    ALTIVEC_REGS are currently assigned an allocno class of VSX_REGS. This then
    misleads the scheduler to think there are 64 regs available, when in
reality
    there are only 32 Altivec regs. This patch fixes the problem by assigning
an
    allocno class of ALTIVEC_REGS and adding ALTIVEC_REGS as a pressure class.

    2021-05-10  Pat Haugen  <pthaugen@linux.ibm.com>

    gcc/ChangeLog:

            * config/rs6000/rs6000.c (rs6000_ira_change_pseudo_allocno_class):
            Return ALTIVEC_REGS if that is best_class.
            (rs6000_compute_pressure_classes): Add ALTIVEC_REGS.

    gcc/testsuite/ChangeLog:

            * gcc.target/powerpc/fold-vec-insert-float-p9.c: Adjust counts.
            * gcc.target/powerpc/vec-rlmi-rlnm.c: Likewise.