From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id AA7B0385DC02; Wed, 1 Apr 2020 19:49:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AA7B0385DC02 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1585770579; bh=MjDP7vG3wPzWbveEpSS/ln1hZU4VZd3Wx3kJcsS9aOg=; h=From:To:Subject:Date:In-Reply-To:References:From; b=K7Y06GtZwCdaBx4n6/2RneQ6HbeTJQDV6rfc5kybrkshsLo+xhmVS1tBr2PPOfxpl HWJkc2TBBadCl/XDkDXW6ak3sIqHbyXiQZ+Cqrw67OmBUaF+vpZB2bzhTuKpdNNOox 1THYEO92rHv82XbPJ863B3nB98t9ennOwvU6n1bQ= From: "bergner at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/91804] [10 regression] r265398 breaks gcc.target/powerpc/vec-rlmi-rlnm.c Date: Wed, 01 Apr 2020 19:49:39 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 10.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: bergner at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 10.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Apr 2020 19:49:39 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D91804 --- Comment #2 from Peter Bergner --- The copy us inserted by IRA's find_moveable_pseudos() function. The problem seems to be that the new pseudo r134 has a different preferred reg class th= an the original pseudo r133.=20 r134: preferred VSX_REGS, alternative NO_REGS, allocno VSX_REGS a7 (r134,l0) best VSX_REGS, allocno VSX_REGS r133: preferred ALTIVEC_REGS, alternative VSX_REGS, allocno VSX_REGS This leads to: ... Popping a7(r134,l0) -- assign reg 32 Popping a4(r127,l0) -- assign reg 64 Popping a6(r133,l0) -- assign reg 64 So r134 is assigned the first VSX reg and r133 gets the first Altivec reg.=