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From: "marxin at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/92071] [10 regression] ICE in gen_movsi, at
 config/arm/arm.md:5378
Date: Fri, 13 Mar 2020 09:11:05 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D92071

Martin Li=C5=A1ka <marxin at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |marxin at gcc dot gnu.org

--- Comment #16 from Martin Li=C5=A1ka <marxin at gcc dot gnu.org> ---
commit r10-7151-g82f620e2ba4c440c5e89bb1f73d10a11ed0f2eb4
Author: Eric Botcazou <ebotcazou@gcc.gnu.org>
Date:   Fri Mar 13 09:16:29 2020 +0100

    Fix unaligned load with small memcpy on the ARM

    store_integral_bit_field is ready to handle BLKmode fields, there is
    even a subtlety with their handling on big-endian targets, see e.g.
    PR middle-end/50325, but not if they are unaligned, so the fix is
    simply to call extract_bit_field for them in order to generate an
    unaligned load.  As a bonus, this subsumes  the big-endian specific
    path that was added under PR middle-end/50325.

            PR middle-end/92071
            * expmed.c (store_integral_bit_field): For fields larger than a
            word, call extract_bit_field on the value if the mode is BLKmod=
e.
            Remove specific path for big-endian targets and tidy things up a
            little bit.=