[Bug rtl-optimization/92080] Missed CSE of _mm512_set1_epi8(c) with _mm256_set1_epi8(c)

["rguenther at suse dot de" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92080

--- Comment #8 from rguenther at suse dot de <rguenther at suse dot de> ---
On Thu, 21 Mar 2024, liuhongt at gcc dot gnu.org wrote:

> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92080
> 
> Hongtao Liu <liuhongt at gcc dot gnu.org> changed:
> 
>            What    |Removed                     |Added
> ----------------------------------------------------------------------------
>                  CC|                            |liuhongt at gcc dot gnu.org
> 
> --- Comment #7 from Hongtao Liu <liuhongt at gcc dot gnu.org> ---
> Another simple case is 
> 
> typedef int v4si __attribute__((vector_size(16)));
> typedef short v8hi __attribute__((vector_size(16)));
> 
> v8hi a;
> v4si b;
> void
> foo ()
> {
>    b = __extension__(v4si){0, 0, 0, 0};
>    a = __extension__(v8hi){0, 0, 0, 0, 0, 0, 0, 0};
> }
> 
> GCC generates 2 pxor
> 
> foo():
>         vpxor   xmm0, xmm0, xmm0
>         vmovdqa XMMWORD PTR b[rip], xmm0
>         vpxor   xmm0, xmm0, xmm0
>         vmovdqa XMMWORD PTR a[rip], xmm0
>         ret

If we were to expose that vpxor before postreload we'd likely CSE but
we have

    5: xmm0:V4SI=const_vector
      REG_EQUIV const_vector
    6: [`b']=xmm0:V4SI
    7: xmm0:V8HI=const_vector
      REG_EQUIV const_vector
    8: [`a']=xmm0:V8HI

until the very end.  But since we have the same mode size on the xmm0
sets CSE could easily handle (integral) constants by hashing/comparing
on their byte representation rather than by using the RTX structure.
OTOH as we mostly have special constants allowed in the IL like this
treating all-zeros and all-ones specially might be good enough ...