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From: "rsandifo at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/92658] x86 lacks vector extend / truncate
Date: Thu, 14 May 2020 13:41:14 +0000	[thread overview]
Message-ID: <bug-92658-4-0KfLK2i1ox@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-92658-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92658

--- Comment #12 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
(In reply to rguenther@suse.de from comment #11)
> On Thu, 14 May 2020, ubizjak at gmail dot com wrote:
> 
> > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92658
> > 
> > --- Comment #10 from Uroš Bizjak <ubizjak at gmail dot com> ---
> > The patch is ready to be pushed, it is waiting for a decision what to do with
> > failed cases.
> > 
> > Richi, should this patch move forward (eventually XFAILing failed cases), or do
> > you plan to look at the fails from the generic vectorizer POV?
> 
> I think we should go forward with the patch, either XFAILing the testcases
> or splitting out the testcase (and backend patterns that do not get
> exercised due to the issue).
> 
> I've already said in comment#8 that the issue here is optabs working
> with modes and not vector types, so it's a bit hard to use the
> same mechanism to deal with the currently failing cases.  One
> possible route would be to add V4QImode similar to how we now
> do V2SFmode with SSE but of course where do we stop ...
> 
> As said we can try to tackle this incrementally.  Maybe Richard also
> has input here?
Nothing to add really, but: yeah, the idea was that the target
would provide smaller vector modes if it can efficiently load,
store and (at least) add them.  I think it would be good to do
that for aarch64 Advanced SIMD at some point.

There are three points behind using vector modes for this:

1. It gives the target the flexibility to decide how best to
   implement the operation (All at one end, and if so, which end?
   Or spread out evenly across the vector?)  On aarch64, the
   choice would differ between SVE and Advanced SIMD.

2. It means that __attribute__((vector_size)) vectors benefit.

3. The smaller modes can be used in conjunction with
   autovectorize_vector_modes to give the loop vectoriser
   a choice between operating on packed or unpacked vectors.
   This is mostly useful for VECT_COMPARE_COSTS but can help
   with low-trip-count loops even without.

So yeah, defining V4QI sounds like the way to go if the
architecture can process it efficiently.  I get the "where
do we stop" concern, but .md mode iterators should help.

  parent reply	other threads:[~2020-05-14 13:41 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <bug-92658-4@http.gcc.gnu.org/bugzilla/>
2020-05-14 12:50 ` ubizjak at gmail dot com
2020-05-14 13:20 ` rguenther at suse dot de
2020-05-14 13:41 ` rsandifo at gcc dot gnu.org [this message]
2020-05-15  8:18 ` crazylht at gmail dot com
2020-05-19  9:26 ` cvs-commit at gcc dot gnu.org
2020-05-19  9:35 ` ubizjak at gmail dot com
2020-05-20  5:12 ` crazylht at gmail dot com
2020-05-20  8:16 ` crazylht at gmail dot com
2020-05-22 13:32 ` cvs-commit at gcc dot gnu.org
2020-05-22 21:50 ` mark at gcc dot gnu.org
2020-05-23  2:28 ` crazylht at gmail dot com
2020-12-25  2:19 ` crazylht at gmail dot com
2020-12-25 10:32 ` ubizjak at gmail dot com
2020-12-29  1:36 ` crazylht at gmail dot com
2021-01-07  6:35 ` cvs-commit at gcc dot gnu.org
2021-12-15  0:53 ` pinskia at gcc dot gnu.org
2021-12-15  1:46 ` crazylht at gmail dot com
2023-05-10 20:43 ` cvs-commit at gcc dot gnu.org
2023-06-03  0:09 ` cvs-commit at gcc dot gnu.org

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