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Subject: [Bug middle-end/93235] [AArch64] ICE with __fp16 in a struct
Date: Thu, 04 Mar 2021 18:39:08 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D93235

--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:0ad6de3883a1641f7ec0bd9cf56d41fa5b313dae

commit r11-7515-g0ad6de3883a1641f7ec0bd9cf56d41fa5b313dae
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Thu Mar 4 19:38:08 2021 +0100

    expand: Fix ICE in store_bit_field_using_insv [PR93235]

    The following testcase ICEs on aarch64.  The problem is that
    op0 is (subreg:HI (reg:HF ...) 0) and because we can't create a SUBREG =
of a
    SUBREG and aarch64 doesn't have HImode insv, only SImode insv,
    store_bit_field_using_insv tries to create (subreg:SI (reg:HF ...) 0)
    which is not valid for the target and so gen_rtx_SUBREG ICEs.

    The following patch fixes it by punting if the to be created SUBREG
    doesn't validate, callers of store_bit_field_using_insv can handle
    the fallback.

    2021-03-04  Jakub Jelinek  <jakub@redhat.com>

            PR middle-end/93235
            * expmed.c (store_bit_field_using_insv): Return false of xop0 i=
s a
            SUBREG and a SUBREG to op_mode can't be created.

            * gcc.target/aarch64/pr93235.c: New test.=