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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/93372] cris performance regressions due to de-cc0 work
Date: Mon, 13 Jul 2020 08:15:36 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D93372

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Hans-Peter Nilsson <hp@gcc.gnu.org>:

https://gcc.gnu.org/g:9a2ae08b02d185a11e3e525e100ba637ce81c7ff

commit r11-2050-g9a2ae08b02d185a11e3e525e100ba637ce81c7ff
Author: Hans-Peter Nilsson <hp@axis.com>
Date:   Sun Jul 12 18:41:25 2020 +0200

    cris: Add new pass eliminating compares after delay-slot-filling

    Delayed-branch-slot-filling a.k.a. reorg or dbr, often causes
    opportunities for more compare-elimination than were visible for
    the cmpelim pass.  With cc0, these were caught by the
    elimination pass run in "final", thus the missed opportunities
    is a regression.  A simple reorg-aware pass run just after reorg
    handles most of them, if not all.  I chose to keep the "mach2"
    pass identifier string I copy-pasted from the SPARC port instead
    of inventing one like "postdbr_cmpelim".  Note the gap in numbers
    in the test-case file names.

    gcc:
            PR target/93372
            * config/cris/cris-passes.def: New file.
            * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
            * config/cris/cris.c: Add infrastructure bits and pass execute
            function cris_postdbr_cmpelim.
            * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim):
Declare.

    gcc/testsuite:
            * gcc.target/cris/pr93372-44.c, gcc.target/cris/pr93372-46.c: N=
ew.=