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From: "guihaoc at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/93453] PPC: rldimi not taken into account to avoid
 shift+or
Date: Tue, 09 Nov 2021 02:38:37 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D93453

HaoChen Gui <guihaoc at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |guihaoc at gcc dot gnu.org

--- Comment #2 from HaoChen Gui <guihaoc at gcc dot gnu.org> ---
My solution is to split the move (from TI to V1TI) into one vsx_concat_v2di=
 and
one V2DI to V1TI move. Thus, TI register 122 can be decomposed.

(insn 12 11 17 2 (set (reg:V1TI 121 [ b ])
        (subreg:V1TI (reg:TI 122 [ a ]) 0)) "test2.c":4:5 1167
{vsx_movv1ti_64bit}
     (expr_list:REG_DEAD (reg:TI 122 [ a ])
        (nil)))

//after split pass
(insn 23 11 24 2 (set (reg:V2DI 125)
        (vec_concat:V2DI (subreg:DI (reg:TI 122 [ a ]) 0)
            (subreg:DI (reg:TI 122 [ a ]) 8))) "test2.c":4:5 -1
     (nil))
(insn 24 23 17 2 (set (reg:V1TI 121 [ b ])
        (subreg:V1TI (reg:V2DI 125) 0)) "test2.c":4:5 -1
     (nil))

//after subreg pass
(insn 23 11 24 2 (set (reg:V2DI 125)
        (vec_concat:V2DI (reg:DI 126 [ a ])
            (reg:DI 127 [ a+8 ]))) "test2.c":4:5 1346 {vsx_concat_v2di}
     (nil))
(insn 24 23 17 2 (set (reg:V1TI 121 [ b ])
        (subreg:V1TI (reg:V2DI 125) 0)) "test2.c":4:5 1167 {vsx_movv1ti_64b=
it}
     (nil))=