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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/93771] SLP produces VEC_PERM when should have used vector generation
Date: Fri, 12 May 2023 06:01:09 +0000 [thread overview]
Message-ID: <bug-93771-4-W3crhDsQR7@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-93771-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93771
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|--- |FIXED
Status|NEW |RESOLVED
Target Milestone|--- |11.0
--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Note the aarch64 code generation for this code is not so bad right now:
ldp q0, q2, [x1]
ldr q1, [x2]
ins v0.d[1], v2.d[1]
fadd v0.2d, v0.2d, v1.2d
str q0, [x0]
Because the PERM
vect__1.7_17 = VEC_PERM_EXPR <vect__1.5_14, vect__1.6_16, { 0, 3 }>;
does the correct thing of doing just the ins now (by
r11-2192-gc9c87e6f9c795bb36e4570a07 )
x86_64 code generation is not bad either:
movupd 16(%rsi), %xmm0
movupd (%rdx), %xmm1
movlpd (%rsi), %xmm0
addpd %xmm1, %xmm0
movups %xmm0, (%rdi)
So I am just going to close this as fixed really.
parent reply other threads:[~2023-05-12 6:01 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <bug-93771-4@http.gcc.gnu.org/bugzilla/>]
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