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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/93974] [10 Regression] ICE in
 decompose_normal_address, at rtlanal.c:6403 on powerpc64le-linux-gnu since
 r10-6762
Date: Wed, 01 Apr 2020 08:09:01 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D93974

--- Comment #15 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Richard Sandiford said on this PR, probably lost due to sourceware migratio=
n:

Sorry for the slow reply, been a bit of a hectic week.=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20

I think both fixes would be valid.  Like you say, the address=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
parsing code isn't yet ready to handle addresses that apply=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
an offset *before* the address "mutations".  That's because=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
no target has yet wanted to support such an address.  So as=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
things stand, the current address is not valid and shouldn't=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
have been created.=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20

In some ways this is similar to creating an invalid highpart=20=20=20=20=20=
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subreg for the upper word of a doubleword vector hard register,=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20
or a subreg that falls foul of some simplify_subreg_regno rule.=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20
The RA has code to avoid doing that, see init_subregs_of_mode=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
and its users.  We could do something similar here for=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
REG_EQUIV MEMs.  One option would be to key off whether=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
strip_address_mutations is a no-op on the address.=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
Another would be to check whether each required sub-MEM=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
is valid for its mode and offset.  The latter would be=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
more elaborate but might produce better code in general,=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
not just for cases like this.=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20

Like you say in comment 4, even the zero-offset half isn't=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
actually a valid address for PowerPC, so either of the two=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
options should give better code as well as fixing the bug.=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20

On the other hand, the idea was always that address_info=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
and its users could be extended if new targets have new=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
requirements.  So if we want to make this operation valid=20=20=20=20=20=20=
=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20
then that would be OK too.=