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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/94438] [8/9 Regression] ICE: verify_gimple failed:
 position plus size exceeds size of referenced object in 'bit_field_ref' with
 -mavx512vbmi -mavx512vl
Date: Wed, 16 Sep 2020 19:20:12 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94438

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-9 branch has been updated by Jakub Jelinek
<jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:cb09410d3c61d325c64b17eabe9dfd1609cec1a6

commit r9-8876-gcb09410d3c61d325c64b17eabe9dfd1609cec1a6
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Wed Apr 8 18:24:12 2020 +0200

    i386: Don't use AVX512F integral masks for V*TImode [PR94438]

    The ix86_get_mask_mode hook uses int mask for 512-bit vectors or
128/256-bit
    vectors with AVX512VL (that is correct), and only for V*[SD][IF]mode if=
 not
    AVX512BW (also correct), but with AVX512BW it would stop checking the
    elem_size altogether and pretend the hw has masking support for V*TImode
    etc., which it doesn't.  That can lead to various ICEs later on.

    2020-04-08  Jakub Jelinek  <jakub@redhat.com>

            PR target/94438
            * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for
elem_size
            1, 2, 4 and 8.

            * gcc.target/i386/avx512bw-pr94438.c: New test.
            * gcc.target/i386/avx512vlbw-pr94438.c: New test.

    (cherry picked from commit 8bf5faa9c463f0d53ffe835ba03d4502edfb959d)=