From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id AA4DA3877034; Mon, 6 Apr 2020 12:59:33 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AA4DA3877034 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1586177973; bh=hTb2OEryqyhTFEprFYKeuBSWPSXB/8N3ZVw58nRdMXc=; h=From:To:Subject:Date:In-Reply-To:References:From; b=yhsZe8+H0JMtUWMn8Zl27nU7xtJHeUFHIKWj6TqbdofZKfAA6/6MufQQAQD8yxNN6 dinpi7ibZmOxLWbkmLRbeLPjgQ86TFfN/luQb8XrvE/Jg5ZaR8wbNswjW8ILLb6TrJ MC+K7BPsckCERnzECOeO7i42S01w/ywRbDTo5wL4= From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/94482] [8/9/10 Regression] Inserting into vector with optimization enabled on x86 generates incorrect result Date: Mon, 06 Apr 2020 12:59:33 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: tree-optimization X-Bugzilla-Version: 9.3.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 8.5 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Apr 2020 12:59:33 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94482 --- Comment #20 from Richard Biener --- (In reply to Richard Biener from comment #19) > gcc.dg/torture/pr52244.c ICEs on the generated >=20 > VIEW_CONVERT_EXPR(u) =3D bar (); >=20 > since V_C_E on the LHS are generally unwanted (but Ada has them for > aggregates > just not in outermost position). What's always possible on the LHS is > to use a BIT_FIELD_REF. So the issue here is that 'u' is a register, not that V_C_E on the LHS are invalid. And we don't have a "general" DECL_GIMPLE_REG_P we could unset since that's just usd for complex and vector types. Which means we'd have to artifically set TREE_ADDRESSABLE on the replacement. It isn't grp_partial_lhs so SRA doesn't do that. In the case of a call we can't move the V_C_E to the RHS so we'd really need to keep the call and insert a compensation assignment. orig =3D bar (); u =3D VIEW_CONVERT (orig); but that doesn't work for a partial access since we're clobbering the whole replacement here. A BIT_FIELD_REF on the LHS for a _register_ is also not possible so the write to a part via an incompatible type would represent itself as orig_full =3D VIEW_CONVERT (repl_full); repl_full =3D VIEW_CONVERT (orig_full); which of course makes this highly suboptimal (but at least correct which is what we should focus on right now).=