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* [Bug debug/94502] New: [aarch64] Missing LR register location in FDE
@ 2020-04-06 14:55 luis.machado at linaro dot org
2020-04-08 13:22 ` [Bug debug/94502] " luis.machado at linaro dot org
` (6 more replies)
0 siblings, 7 replies; 8+ messages in thread
From: luis.machado at linaro dot org @ 2020-04-06 14:55 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502
Bug ID: 94502
Summary: [aarch64] Missing LR register location in FDE
Product: gcc
Version: 10.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: debug
Assignee: unassigned at gcc dot gnu.org
Reporter: luis.machado at linaro dot org
Target Milestone: ---
I've noticed this while investigating a GDB testsuite failure in
gdb.opt/inline-break.exp. Basically GDB runs into an internal error due to not
being able to unwind the PC register (which, in turn, requires the LR
register).
I originally noticed this with Ubuntu's GCC (gcc version 7.4.0 (Ubuntu
7.4.0-1ubuntu1~18.04.1). But i managed to reproduce the same problem with gcc
master at revision c72a1b6f8b26de37d1a922a8af143af009747498.
Reproduction steps:
1 - Build the test like so: gcc -g3
<gdb_tree_path>/gdb/testsuite/gdb.opt/inline-break/inline-break.c -o
inline-break
2 - readelf -w inline-break > inline-break.dwarf
3 - Take note of the low address of function not_inline_func1
4 - Locate the FDE entry for the PC above.
5 - You'll notice there is no rule to locate LR, which is required by GDB to
determine PC.
This is the FDE entry i see:
00000108 0000000000000014 0000010c FDE cie=00000000
pc=0000000000400674..00000000004006b0
DW_CFA_advance_loc: 4 to 0000000000400678
DW_CFA_def_cfa_offset: 32
DW_CFA_advance_loc: 52 to 00000000004006ac
DW_CFA_def_cfa_offset: 0
DW_CFA_nop
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Bug debug/94502] [aarch64] Missing LR register location in FDE
2020-04-06 14:55 [Bug debug/94502] New: [aarch64] Missing LR register location in FDE luis.machado at linaro dot org
@ 2020-04-08 13:22 ` luis.machado at linaro dot org
2020-04-08 13:57 ` wilco at gcc dot gnu.org
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: luis.machado at linaro dot org @ 2020-04-08 13:22 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502
--- Comment #1 from Luis Machado <luis.machado at linaro dot org> ---
CC-ing ARM folks so they can assign this to whoever is more appropriate.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Bug debug/94502] [aarch64] Missing LR register location in FDE
2020-04-06 14:55 [Bug debug/94502] New: [aarch64] Missing LR register location in FDE luis.machado at linaro dot org
2020-04-08 13:22 ` [Bug debug/94502] " luis.machado at linaro dot org
@ 2020-04-08 13:57 ` wilco at gcc dot gnu.org
2020-04-08 14:15 ` luis.machado at linaro dot org
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: wilco at gcc dot gnu.org @ 2020-04-08 13:57 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502
Wilco <wilco at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |wilco at gcc dot gnu.org
--- Comment #2 from Wilco <wilco at gcc dot gnu.org> ---
(In reply to Luis Machado from comment #1)
> CC-ing ARM folks so they can assign this to whoever is more appropriate.
Can you list the assembly code? My understanding is that unless LR is saved
there is no entry needed as the default action is to return to LR.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Bug debug/94502] [aarch64] Missing LR register location in FDE
2020-04-06 14:55 [Bug debug/94502] New: [aarch64] Missing LR register location in FDE luis.machado at linaro dot org
2020-04-08 13:22 ` [Bug debug/94502] " luis.machado at linaro dot org
2020-04-08 13:57 ` wilco at gcc dot gnu.org
@ 2020-04-08 14:15 ` luis.machado at linaro dot org
2020-04-08 14:20 ` wilco at gcc dot gnu.org
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: luis.machado at linaro dot org @ 2020-04-08 14:15 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502
--- Comment #3 from Luis Machado <luis.machado at linaro dot org> ---
Here's a DWARF and asm dump from the same binary:
000000d0 000000000000001c 00000000 FDE cie=00000000
pc=00000000000007f4..0000000000000830
DW_CFA_advance_loc: 4 to 00000000000007f8
DW_CFA_def_cfa_offset: 32
DW_CFA_advance_loc: 52 to 000000000000082c
DW_CFA_def_cfa_offset: 0
DW_CFA_nop
DW_CFA_nop
00000000000007f4 <not_inline_func1>:
7f4: d10083ff sub sp, sp, #0x20
7f8: b9000fe0 str w0, [sp, #12]
7fc: 52800040 mov w0, #0x2 // #2
800: b90017e0 str w0, [sp, #20]
804: b9400fe0 ldr w0, [sp, #12]
808: b9001be0 str w0, [sp, #24]
80c: 52800020 mov w0, #0x1 // #1
810: b9001fe0 str w0, [sp, #28]
814: b9401be1 ldr w1, [sp, #24]
818: b9401fe0 ldr w0, [sp, #28]
81c: 0b000021 add w1, w1, w0
820: b94017e0 ldr w0, [sp, #20]
824: 0b000020 add w0, w1, w0
828: 910083ff add sp, sp, #0x20
82c: d65f03c0 ret
Sources:
static inline ATTR int
inline_func1 (int x)
{
int y = 1; /* inline_func1 */
return y + x;
}
static int
not_inline_func1 (int x)
{
int y = 2; /* not_inline_func1 */
return y + inline_func1 (x);
}
--
The lack of a rule for LR means GDB will assume the register is UNSPECIFIED. Is
GCC assuming this register is considered to have the same value as an inner
frame?
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Bug debug/94502] [aarch64] Missing LR register location in FDE
2020-04-06 14:55 [Bug debug/94502] New: [aarch64] Missing LR register location in FDE luis.machado at linaro dot org
` (2 preceding siblings ...)
2020-04-08 14:15 ` luis.machado at linaro dot org
@ 2020-04-08 14:20 ` wilco at gcc dot gnu.org
2020-04-08 14:40 ` luis.machado at linaro dot org
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: wilco at gcc dot gnu.org @ 2020-04-08 14:20 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502
--- Comment #4 from Wilco <wilco at gcc dot gnu.org> ---
(In reply to Luis Machado from comment #3)
> The lack of a rule for LR means GDB will assume the register is UNSPECIFIED.
> Is GCC assuming this register is considered to have the same value as an
> inner frame?
Right so it's a leaf function like I suspected. The default rule has always
been to use the return register LR if it isn't stored (and that doesn't change
if you adjust the stack). Leaf functions have always worked, so I'm surprised
you are seeing an issue.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Bug debug/94502] [aarch64] Missing LR register location in FDE
2020-04-06 14:55 [Bug debug/94502] New: [aarch64] Missing LR register location in FDE luis.machado at linaro dot org
` (3 preceding siblings ...)
2020-04-08 14:20 ` wilco at gcc dot gnu.org
@ 2020-04-08 14:40 ` luis.machado at linaro dot org
2020-04-08 14:40 ` luis.machado at linaro dot org
2020-04-09 10:34 ` rearnsha at gcc dot gnu.org
6 siblings, 0 replies; 8+ messages in thread
From: luis.machado at linaro dot org @ 2020-04-08 14:40 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502
--- Comment #5 from Luis Machado <luis.machado at linaro dot org> ---
Thanks for confirming this behavior. There have been some changes to the DWARF
unwinding code that exposed this particular case. I'm guessing this will need
to go back to GDB for a fixup.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Bug debug/94502] [aarch64] Missing LR register location in FDE
2020-04-06 14:55 [Bug debug/94502] New: [aarch64] Missing LR register location in FDE luis.machado at linaro dot org
` (4 preceding siblings ...)
2020-04-08 14:40 ` luis.machado at linaro dot org
@ 2020-04-08 14:40 ` luis.machado at linaro dot org
2020-04-09 10:34 ` rearnsha at gcc dot gnu.org
6 siblings, 0 replies; 8+ messages in thread
From: luis.machado at linaro dot org @ 2020-04-08 14:40 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502
Luis Machado <luis.machado at linaro dot org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution|--- |FIXED
--- Comment #6 from Luis Machado <luis.machado at linaro dot org> ---
Confirmed a non-issue for GCC.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Bug debug/94502] [aarch64] Missing LR register location in FDE
2020-04-06 14:55 [Bug debug/94502] New: [aarch64] Missing LR register location in FDE luis.machado at linaro dot org
` (5 preceding siblings ...)
2020-04-08 14:40 ` luis.machado at linaro dot org
@ 2020-04-09 10:34 ` rearnsha at gcc dot gnu.org
6 siblings, 0 replies; 8+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2020-04-09 10:34 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502
Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|FIXED |INVALID
--- Comment #7 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
Compiler was conforming to specification. Not a bug.
^ permalink raw reply [flat|nested] 8+ messages in thread
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2020-04-06 14:55 [Bug debug/94502] New: [aarch64] Missing LR register location in FDE luis.machado at linaro dot org
2020-04-08 13:22 ` [Bug debug/94502] " luis.machado at linaro dot org
2020-04-08 13:57 ` wilco at gcc dot gnu.org
2020-04-08 14:15 ` luis.machado at linaro dot org
2020-04-08 14:20 ` wilco at gcc dot gnu.org
2020-04-08 14:40 ` luis.machado at linaro dot org
2020-04-08 14:40 ` luis.machado at linaro dot org
2020-04-09 10:34 ` rearnsha at gcc dot gnu.org
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