From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id DA4D0385DC2B; Tue, 14 Apr 2020 11:59:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DA4D0385DC2B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1586865547; bh=J91Ggw9AG6CBSPFmTRh7pLDHReWMCzhCHUTMhAxu6Iw=; h=From:To:Subject:Date:In-Reply-To:References:From; b=hq8/0UbMU+wYJFvkhHsxuP/NzEYvfAeaG/VUHzDanfqJMxceOVQx68+Zsik6hQ1bc +gvP5GpilehZvUuP3IQhhgDYw48QU1p600BDGreFRGv/BCT9ap6FX5odBIg5eyiMcs hhXWuSL8y5tuB3IIChXgMw5eLdVul2cz5axAzqNI= From: "law at redhat dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/94567] [10 Regression] wrong code at -O2 and -O3 on x86_64-linux-gnu Date: Tue, 14 Apr 2020 11:59:07 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 10.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: law at redhat dot com X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: law at redhat dot com X-Bugzilla-Target-Milestone: 10.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 14 Apr 2020 11:59:08 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94567 --- Comment #5 from Jeffrey A. Law --- I've pondered just killing that pattern, but I'm pretty sure there'll be notable regressions. There was a clear regression we fixed in gcc-6 due to= not handling QImode operands in that pattern. What I'm playing with is looking at pos + len and if it hits the sign bit in the operand's mode, then widening the mode. Something like this: + /* If the mask is going to have the sign bit set in the mode + we want to do the comparison, then we must widen the target + mode. Otherwise the flags will be incorrect when we split + this into a (compare (and (op0) (mask))) and a subsequent + test like LE will get the wrong result. */ + if (mode < E_DImode + && pos + len =3D=3D GET_MODE_PRECISION (mode)) + { + mode =3D GET_MODE_WIDER_MODE (mode).require (); + val =3D gen_lowpart (mode, val); + } + Which I think is roughly what you were suggesting. Mine does it with a SUB= REG, so it matches existing patterns... A ZERO_EXTEND may well require new patterns.=