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From: "segher at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/94613] S/390: Wrong code generated for vec_sel builtin
Date: Thu, 16 Apr 2020 21:18:05 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94613

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|s390x                       |s390x powerpc*-*-*
   Last reconfirmed|                            |2020-04-16
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1

--- Comment #7 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Yes.  The rs6000 code is bad as well:

(define_insn "*altivec_vsel<mode>"
  [(set (match_operand:VM 0 "altivec_register_operand" "=3Dv")
        (if_then_else:VM
         (ne:CC (match_operand:VM 1 "altivec_register_operand" "v")
                (match_operand:VM 4 "zero_constant" ""))
         (match_operand:VM 2 "altivec_register_operand" "v")
         (match_operand:VM 3 "altivec_register_operand" "v")))]
  "VECTOR_MEM_ALTIVEC_P (<MODE>mode)"
  "vsel %0,%3,%2,%1"
  [(set_attr "type" "vecmove")])

That is not what the insn does (the compare should be *bitwise*: it does

  op0 :=3D (op2 & ~op1) | (op3 & op1)

This can be written a few different ways in RTL; we'll have to find out
what works best.=