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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/94643] [sign extension of nonnegative value from 32 to 64 bits Date: Sat, 18 Apr 2020 01:49:28 +0000 [thread overview] Message-ID: <bug-94643-4-wMritRXz2P@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-94643-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94643 Andrew Pinski <pinskia at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- Ever confirmed|0 |1 Keywords| |missed-optimization Status|UNCONFIRMED |NEW Last reconfirmed| |2020-04-18 Summary|[x86_64] gratuitous sign |[sign extension of |extension of nonnegative |nonnegative value from 32 |value from 32 to 64 bits |to 64 bits Severity|normal |enhancement Component|target |tree-optimization --- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> --- This could be done on the tree level: Given (where _1 is short unsigned): _2 = (int) _1; _3 = _2 * 16; _6 = (uint64_t) _3; We should be able to convert this to: _7 = (uint64_t) _1; _6 = _7 << 4; But there might be a few steps inbetween. I will let someone decide on how it would work. This is true even on AARCH64: adrp x1, a add x1, x1, :lo12:a ldrh w0, [x1, w0, sxtw 1] ubfiz x0, x0, 4, 16 ret But ubfiz is the the zero extend and shift in one instruction so it does not matter in the end ...
prev parent reply other threads:[~2020-04-18 1:49 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-18 0:50 [Bug target/94643] New: [x86_64] gratuitous sign " bugdal at aerifal dot cx 2020-04-18 1:49 ` pinskia at gcc dot gnu.org [this message]
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