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From: "gabravier at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/94846] Failure to optimize jnc+inc into adc
Date: Wed, 29 Apr 2020 12:12:29 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94846

Gabriel Ravier <gabravier at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|x86_64-* i?86-*-*           |

--- Comment #1 from Gabriel Ravier <gabravier at gmail dot com> ---
Some extra notes :=20

This also occurs on i?86.

This is the LLVM output :

f(unsigned int*, unsigned int): # @f(unsigned int*, unsigned int)
  mov ecx, dword ptr [esp + 4]
  mov eax, dword ptr [ecx]
  add eax, dword ptr [esp + 8]
  adc eax, 0
  mov dword ptr [ecx], eax
  ret

This is the GCC output :

f(unsigned int*, unsigned int):
  mov edx, DWORD PTR [esp+4]
  mov eax, DWORD PTR [edx]
  add eax, DWORD PTR [esp+8]
  jnc .L6
  add eax, 1
.L6:
  mov DWORD PTR [edx], eax
  ret

This also occurs on aarch64.

This is the LLVM output :=20

f(unsigned int*, unsigned int): // @f(unsigned int*, unsigned int)
  ldr w8, [x0]
  adds w8, w8, w1
  cinc w8, w8, hs
  str w8, [x0]
  mov w0, w8
  ret

This is the GCC output (as of GCC 9.2, didn't have the time to check GCC 10=
 for
aarch64 ) :

f:
  ldr w2, [x0]
  mov x3, x0
  adds w0, w2, w1
  bcc .L6
  add w0, w0, 1
.L6:
  str w0, [x3]
  ret=