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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/94866] Failure to optimize pinsrq of 0 with index 1 into
 movq
Date: Thu, 30 Apr 2020 07:13:27 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94866

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2020-04-30
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
         Depends on|                            |94864

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
We're expanding from

  _3 =3D BIT_INSERT_EXPR <a_1(D), 0, 64 (64 bits)>;
  return _3;

which ends up using

(insn 8 7 9 (set (reg:V2DI 85)
        (vec_merge:V2DI (vec_duplicate:V2DI (reg:DI 86))
            (reg:V2DI 85)
            (const_int 2 [0x2]))) "y.c":6:28 -1

so likely the vec_merge "issue" again.


Referenced Bugs:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94864
[Bug 94864] Failure to combine vunpckhpd+movsd into single vunpckhpd=