From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id EA5F1385DC35; Mon, 18 May 2020 09:37:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EA5F1385DC35 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1589794650; bh=Ukl2t9evRC5iYOVV9Aq5rWF53WHpOTKL/18D2+2BRHg=; h=From:To:Subject:Date:In-Reply-To:References:From; b=N862BxZQd614WWNbwVXPaxvXNK8XcV5Ycpz/VjzV0NIqDEzbq3GajDLBN7WYVdYlq nTXVY99cwbosu2ukNonuavISq1wfj9j56oVS16/RyRlmTwZFkeFQ7qDXL9B53iHQaQ u9HoXdtVaNETc1ig9l90VP/DwdmzP+fyFUW4JhaY= From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/94962] Suboptimal AVX2 code for _mm256_zextsi128_si256(_mm_set1_epi8(-1)) Date: Mon, 18 May 2020 09:37:30 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 10.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 May 2020 09:37:31 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94962 Jakub Jelinek changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |jakub at gcc dot gnu.org --- Comment #2 from Jakub Jelinek --- But such an instruction isn't always redundant, it really depends on what t= he previous setter of the register did, whether the upper 128 bit of the 256-b= it register are already guaranteed to be zero or not. Thus the #c1 patch looks incorrect to me, one would need peephole2s or some combine patterns or target specific pass etc. to discover that at least for= the common cases; and it isn't something we model in the RTL patterns (what ins= ns guarantee which upper bits zero and what do not; and for some there can be different choices even in the same define_insn, we could implement something using widened registers and then there would be no guarantee etc.).=