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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/95078] Missing fwprop for SIB address Date: Wed, 13 May 2020 01:57:31 +0000 [thread overview] Message-ID: <bug-95078-4-3vN5yz5gdx@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-95078-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95078 --- Comment #2 from Hongtao.liu <crazylht at gmail dot com> --- (In reply to Richard Biener from comment #1) > TER should go away, not be extended. So you are suggesting that we replace > > leaq 44(%rdi,%rdx,4), %rdx --- redundant could be fwprop > movl (%rdx), %eax > movl $3, (%rsi) > addl (%rdx), %eax > > with > > movl 44(%rdi,%rdx,4), %eax > movl $3, (%rsi) > addl 44(%rdi,%rdx,4), %eax > Yes. > ? The variant that looks bigger is actually one byte smaller. Note as > soon as there are three uses it will be larger again... > > So this is really something for RTL and yeah, fwprop only makes "local" > decisions. Note that I think that your proposed variant will consume > more resources since the complex addressing modes are likely split into > a separate uop. Yes, overall I'd expect less latency for your sequence. Yes, also it will increase register pressure since propagation mostly would increase live range for base and index reg, it's a subtle optimization, maybe a cost model could help, and fwprop should be more "smart" to see the redundance of adress calculation after propagation.
prev parent reply other threads:[~2020-05-13 1:57 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-12 9:18 [Bug target/95078] New: " crazylht at gmail dot com 2020-05-12 11:34 ` [Bug target/95078] " rguenth at gcc dot gnu.org 2020-05-13 1:57 ` crazylht at gmail dot com [this message]
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