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From: "rsandifo at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/95341] New: Poor vector_size decomposition when SVE is enabled
Date: Tue, 26 May 2020 16:44:05 +0000	[thread overview]
Message-ID: <bug-95341-4@http.gcc.gnu.org/bugzilla/> (raw)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95341

            Bug ID: 95341
           Summary: Poor vector_size decomposition when SVE is enabled
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rsandifo at gcc dot gnu.org
  Target Milestone: ---
            Target: aarch64*-*-*

Compiling the following with -O2 -march=armv8-a:

  typedef unsigned int uint_vec __attribute__((vector_size(32)));
  uint_vec f1(uint_vec x, uint_vec y) { return x + y; }

generates nice Advanced SIMD code:

        ld1     {v4.16b - v5.16b}, [x0]
        ld1     {v2.16b - v3.16b}, [x1]
        add     v0.4s, v4.4s, v2.4s
        add     v1.4s, v5.4s, v3.4s
        st1     {v0.16b - v1.16b}, [x8]
        ret

But compiling with -march=armv8.2-a+sve generates extremely bad
scalar code, so bad that I'll spare people's eyes by not quoting
it here.

I haven't yet analysed this or checked whether it's a regression.

             reply	other threads:[~2020-05-26 16:44 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-26 16:44 rsandifo at gcc dot gnu.org [this message]
2020-05-26 16:55 ` [Bug target/95341] " ktkachov at gcc dot gnu.org
2020-05-26 17:13 ` ktkachov at gcc dot gnu.org
2020-05-26 17:21 ` rsandifo at gcc dot gnu.org
2020-05-27  7:38 ` rguenth at gcc dot gnu.org
2024-02-27  8:08 ` pinskia at gcc dot gnu.org

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