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Subject: [Bug target/95355] [11 Regression] Assembler messages: Error:
 operand size mismatch for `vpmovzxbd' with -masm=intel since
 r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
Date: Wed, 15 Jul 2020 19:30:21 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D95355

--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:6c2848ad02feef5ac094d1158be3861819b3bb49

commit r11-2140-g6c2848ad02feef5ac094d1158be3861819b3bb49
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Wed Jul 15 21:27:00 2020 +0200

    i386: Introduce peephole2 to use flags from CMPXCHG more [PR96189]

    CMPXCHG instruction sets ZF flag if the values in the destination opera=
nd
    and EAX register are equal; otherwise the ZF flag is cleared and value
    from destination operand is loaded to EAX. Following assembly:

            movl    %esi, %eax
            lock cmpxchgl   %edx, (%rdi)
            cmpl    %esi, %eax
            sete    %al

    can be optimized by removing the unneeded comparison, since set ZF flag
    signals that no update to EAX happened.

    2020-15-07  Uro=C3=85=C2=A1 Bizjak  <ubizjak@gmail.com>

    gcc/ChangeLog:
            PR target/95355
            * config/i386/sync.md
            (peephole2 to remove unneded compare after CMPXCHG): New patter=
n.

    gcc/testsuite/ChangeLog:
            PR target/95355
            * gcc.target/i386/pr96189.c: New test.=