[Bug target/95632] Redundant zero extension

["wilson at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95632

Jim Wilson <wilson at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2020-06-12
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1

--- Comment #1 from Jim Wilson <wilson at gcc dot gnu.org> ---
We sign extend HImode constants as that is the natural thing to do to make
arithmetic work.  This does mean that unsigned short logical operations need a
zero extend after the operation which might otherwise be unnecessary.  This
can't be handled at rtl generation time as we don't know if the constant will
be used for arithmetic or logicals or signed or unsigned.  But maybe an
optimization pass could go over the code and convert HImode constants to signed
or unsigned as appropriate to reduce the number of sign/zero extend operations.
 We have the ree pass that we might be able to extend to handle this.

Handling this in combine requires a 4->3 splitter which is something combine
doesn't do.  We could work around that by not splitting constants before
combine, but that would be a major change and probably not beneficial, as we
wouldn't be able to easily optimize the high part of the constants anymore.

Another approach here might be to split the xor along with the constant.  If we
generated something like
        srli    a0,a0,1
        xori    a0,a0,1
        li      a5,-24576
        xor     a0,a0,a5
then we can optimize away the following zero extend with a 3->2 splitter which
combine already supports via find_split_point.  We can still optimize the high
part of the constant. Since the immediates are sign extended, if the low part
of the immediate has the sign bit set, we would have to invert the high part of
the immediate to get the right result.  At least I think that works, I haven't
double checked it yet.  This only works for or if the low part doesn't have the
sign bit set.  And this only works for and if the low part does have the sign
bit set.