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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/95632] Redundant zero extension
Date: Tue, 16 Jun 2020 07:21:04 +0000	[thread overview]
Message-ID: <bug-95632-4-kO8g57RFQX@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-95632-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95632

--- Comment #6 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Uroš Bizjak from comment #5)
> (In reply to Mel Chen from comment #2)
> > Is it possible to pretend that we have a pattern that can match xor (reg:SI
> > 80), (reg: SI 72), 0xa001 in combine pass?
> > And then, if the constant part is too large to put in to the immediate part,
> > it can be split to 2 xor in split pass.
> 
> Please note that the combine pass has its own (rather limited) splitter, it
> is documented in the second part of "Defining How to Split Instructions"
> paragraph. The example is dealing with the instruction that has too large
> immediate part, and looks similar to your problem.

Oh, I missed the discussion above. In this case, x86 implements pre-reload
splits, please see patterns decorated with ix86_pre_reload_split condition.

  parent reply	other threads:[~2020-06-16  7:21 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-11  4:06 [Bug target/95632] New: " bina2374 at gmail dot com
2020-06-12  4:25 ` [Bug target/95632] " wilson at gcc dot gnu.org
2020-06-15  9:49 ` bina2374 at gmail dot com
2020-06-16  0:01 ` wilson at gcc dot gnu.org
2020-06-16  0:02 ` wilson at gcc dot gnu.org
2020-06-16  7:15 ` ubizjak at gmail dot com
2020-06-16  7:21 ` ubizjak at gmail dot com [this message]
2021-05-30 22:26 ` pinskia at gcc dot gnu.org
2022-12-27 23:31 ` cvs-commit at gcc dot gnu.org
2022-12-27 23:32 ` law at gcc dot gnu.org

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