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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/95713] [10/11 Regression] ICE in emit_move_insn when converting int2 vector to short2 vector for -march=skylake-avx512 since r10-5031-g78307657cf9675bc
Date: Wed, 17 Jun 2020 06:54:53 +0000	[thread overview]
Message-ID: <bug-95713-4-MxRcO0Z5vn@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-95713-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95713

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|i?86-*-*                    |x86_64-*-* i?86-*-*
   Target Milestone|---                         |10.2
                 CC|                            |hjl.tools at gmail dot com,
                   |                            |kyukhin at gcc dot gnu.org

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
So the expansion of

  b_4 = VEC_PACK_TRUNC_EXPR <_2, _7>;

with two V1SI operands results in a DImode rtx (reg:DI 93) but RTL
expansion wants to see it in (reg:SI 84) (that is b).  But the
simplistic code doing that doesn't work (obviously):

                temp = force_operand (temp, target);
                if (temp != target)
                  emit_move_insn (target, temp);

I guess the expansion of VEC_PACK_TRUNC_EXPR is "wrong".  We do have
CODE_FOR_vec_pack_trunc_si but that maps to

(define_expand "vec_pack_trunc_<mode>"
  [(set (match_operand:<DOUBLEMASKMODE> 0 "register_operand")
        (ior:<DOUBLEMASKMODE>
          (ashift:<DOUBLEMASKMODE>
            (zero_extend:<DOUBLEMASKMODE>
              (match_operand:SWI24 2 "register_operand"))
            (match_dup 3))
          (zero_extend:<DOUBLEMASKMODE>
            (match_operand:SWI24 1 "register_operand"))))]
  "TARGET_AVX512BW"

where expand_binop_directly does

1098      if (binoptab == vec_pack_trunc_optab
...
1106          /* The mode of the result is different then the mode of the
1107             arguments.  */
1108          tmp_mode = insn_data[(int) icode].operand[0].mode;

and tmp_mode ends up as DImode.  Shouldn't the pattern use HALFMASKMODE?

Are those patterns supposed to only trigger for VECTOR_BOOLEAN and not
"generic" vectors mapping to integer modes?

  parent reply	other threads:[~2020-06-17  6:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-16 20:12 [Bug rtl-optimization/95713] New: [10/11 Regression] ICE in emit_move_insn when converting int2 vector to short2 vector for -march=skylake-avx512 -m32 kretz at kde dot org
2020-06-17  6:23 ` [Bug target/95713] [10/11 Regression] ICE in emit_move_insn when converting int2 vector to short2 vector for -march=skylake-avx512 since r10-5031-g78307657cf9675bc marxin at gcc dot gnu.org
2020-06-17  6:54 ` rguenth at gcc dot gnu.org [this message]
2020-06-17  6:59 ` rguenth at gcc dot gnu.org
2020-06-17  8:46 ` jakub at gcc dot gnu.org
2020-06-17  9:53 ` jakub at gcc dot gnu.org
2020-06-18  8:25 ` kretz at kde dot org
2020-06-18 10:13 ` cvs-commit at gcc dot gnu.org
2020-06-18 10:18 ` cvs-commit at gcc dot gnu.org
2020-06-29  9:56 ` jakub at gcc dot gnu.org

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