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From: "ams at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/95730] GCN offloading ICEs after commit fe7ebef7fe4f9acb79658ed9db0749b07efc3105 "Add support for __builtin_bswap128" Date: Wed, 17 Jun 2020 21:22:43 +0000 [thread overview] Message-ID: <bug-95730-4-vvIOe988Qa@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-95730-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95730 --- Comment #1 from Andrew Stubbs <ams at gcc dot gnu.org> --- GCN uses TImode for a few special purposes, but lacks real TImode support. (Basically, it allows TImode loads and stores for the SLP fake vectorization, and there's one instruction that needs two DImode values in consecutive registers.) Probably this is a GCN-specific issue, and we should be finding another way to handle the quasi-128-bit values.
next prev parent reply other threads:[~2020-06-17 21:22 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-17 20:34 [Bug target/95730] New: " tschwinge at gcc dot gnu.org 2020-06-17 21:22 ` ams at gcc dot gnu.org [this message] 2020-06-17 21:50 ` [Bug target/95730] " ebotcazou at gcc dot gnu.org 2020-06-18 13:11 ` ams at gcc dot gnu.org 2020-07-24 12:25 ` ams at gcc dot gnu.org 2020-07-24 15:04 ` ebotcazou at gcc dot gnu.org 2020-07-27 13:09 ` tschwinge at gcc dot gnu.org 2021-04-27 11:39 ` jakub at gcc dot gnu.org 2021-07-28 7:04 ` rguenth at gcc dot gnu.org 2022-04-21 7:48 ` rguenth at gcc dot gnu.org 2023-05-29 10:03 ` jakub at gcc dot gnu.org
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