From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id C64C9388E810; Wed, 24 Jun 2020 06:51:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C64C9388E810 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1592981517; bh=QUUsGCFdKq7S5pXmUW7yylwOrBsHqHCUGFXSxhrVuAM=; h=From:To:Subject:Date:In-Reply-To:References:From; b=N0XsCm7ajs6g2Pq1hVUqu4tisLrPNlLJaNqnILVgkK63Y754hj6TtlJ029tN1k0Lg 5QpI7l4n7bXgCZ6bnQXKPT5RR9PuD5GgoyrSTv5KcKtsK/Txi/xyaOhn9bsO5DSabq HAIUly7Ll9Jb2CyMJsNUPNwT3Xvps12o4AkmJxKE= From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/95845] Failure to optimize vector load made in separate operations to single load Date: Wed, 24 Jun 2020 06:51:57 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: tree-optimization X-Bugzilla-Version: 11.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc cf_reconfirmed_on bug_status everconfirmed Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Jun 2020 06:51:57 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D95845 Richard Biener changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |rguenth at gcc dot gnu.org Last reconfirmed| |2020-06-24 Status|UNCONFIRMED |NEW Ever confirmed|0 |1 --- Comment #1 from Richard Biener --- So this is VIEW_CONVERT_EXPR(r)[0] =3D *ptr; VIEW_CONVERT_EXPR(r)[1] =3D *(ptr + 4); from the FEs and _1 =3D *ptr_4(D); r_6 =3D BIT_INSERT_EXPR ; _2 =3D MEM[(const float *)ptr_4(D) + 4B]; r_7 =3D BIT_INSERT_EXPR ; after SSA rewrite. There's no further combining of inserts happening, I guess forwprop might want to see whether an insert chain forms a full CTOR. BB vectorization might also a candidate to look at but it would be quite late. The issue with forwprop is to somehow avoid quadraticness in searching the chain which will be difficult given it's structure. One possibility would be to perform a forward search from BIT_INSERT_EXPRs with a default def arg and mark the last BIT_INSERT_EXPR in a single-use chain as to be processed. Or declare it not a problem.=