From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 7A888386EC42; Mon, 29 Jun 2020 11:11:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7A888386EC42 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1593429090; bh=cyJ2rzozFb+Sfl0Y0MqU6ub3BUsRa38+Tzp0lwkvUlI=; h=From:To:Subject:Date:In-Reply-To:References:From; b=hSDaL2sUmErITfRM/0hZQ8vAQEobu5UaHjrwtxcZQ+QofOCblffd4Jd42ynTLSIxj HQJREtF1AfXsJWTh6bJjPKcwz1Qe1lwLf5UqEBEZjviC4Z0kpSeE7cDSy84MmWu/Hm rcSk6m+JNyOTG0YLheDD7IaxxMlldRptS6j8u4S4= From: "rsandifo at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/95958] [meta-bug] Inefficient arm_neon.h code for AArch64 Date: Mon, 29 Jun 2020 11:11:30 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 11.0 X-Bugzilla-Keywords: meta-bug, missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: rsandifo at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: keywords dependson Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 Jun 2020 11:11:30 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D95958 rsandifo at gcc dot gnu.org changed: What |Removed |Added ---------------------------------------------------------------------------- Keywords| |missed-optimization Depends on| |66675, 80283, 88212, 89057, | |89606, 89967, 91753, 94442, | |95265, 91598, 82074 --- Comment #1 from rsandifo at gcc dot gnu.org --- At the time of writing, PR80283 doesn't have an AArch64 testcase, only an AArch32 one. However, the underlying issue applies across targets. The content probably overlaps a lot with PR91598, which is AArch64-specific. Referenced Bugs: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D66675 [Bug 66675] Could improve vector lane folding style operations. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D80283 [Bug 80283] [8/9/10/11 Regression] bad SIMD register allocation https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D82074 [Bug 82074] [aarch64] vmlsq_f32 compiled into 2 instructions https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D88212 [Bug 88212] IRA Register Coalescing not working for the testcase https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D89057 [Bug 89057] [8/9/10/11 Regression] AArch64 ld3 st4 less optimized https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D89606 [Bug 89606] Extra mov after structure load instructions on aarch64 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D89967 [Bug 89967] Inefficient code generation for vld2q_lane_u8 under aarch64 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D91598 [Bug 91598] [8/9 regression] 60% speed drop on neon intrinsic loop https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D91753 [Bug 91753] Bad register allocation of multi-register types https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D94442 [Bug 94442] [10/11 regression] Redundant loads/stores emitted at -O3 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D95265 [Bug 95265] aarch64: suboptimal code generation for common neon intrinsic sequence involving shrn and mull=