From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 887633857417; Sun, 30 May 2021 23:19:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 887633857417 From: "pinskia at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/95967] Poor aarch64 vector constructor code when using arm_neon.h Date: Sun, 30 May 2021 23:19:35 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 11.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: enhancement X-Bugzilla-Who: pinskia at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 30 May 2021 23:19:35 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D95967 --- Comment #4 from Andrew Pinski --- (In reply to Andrew Pinski from comment #3) > Created attachment 50891 [details] > Start of the patch which should fix most of it >=20 > This patch which should fix the majority of the problem though I have not > tested it on the testcase. Basically it takes the BIT_INSERT_EXPR's and > "combines" them such that they become a CONSTRUCTOR. > I am still deciding if this belongs in reassoc or as part of forwprop. This patch looks like it only fixes f1 and g1. Most likely because I did not handle CONSTRUCTOR as the initial case: f2: _6 =3D {s0_2(D), s0_2(D), s0_2(D), s0_2(D)}; __builtin_aarch64_im_lane_boundsi (16, 4, 1); __builtin_aarch64_im_lane_boundsi (16, 4, 2); __builtin_aarch64_im_lane_boundsi (16, 4, 3); _10 =3D BIT_INSERT_EXPR <_6, s1_3(D), 32>; _12 =3D BIT_INSERT_EXPR <_10, s2_4(D), 64>; __vec_14 =3D BIT_INSERT_EXPR <_12, s3_5(D), 96>; I will look into adding that in a few weeks and add a testcase for it too.=