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* [Bug c/96632] New: missed-optimization with conditionally unsetting bits in memory.
@ 2020-08-16 20:36 goldstein.w.n at gmail dot com
2020-08-25 10:26 ` [Bug rtl-optimization/96632] " rguenth at gcc dot gnu.org
2021-08-14 9:47 ` pinskia at gcc dot gnu.org
0 siblings, 2 replies; 3+ messages in thread
From: goldstein.w.n at gmail dot com @ 2020-08-16 20:36 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96632
Bug ID: 96632
Summary: missed-optimization with conditionally unsetting bits
in memory.
Product: gcc
Version: 10.2.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: goldstein.w.n at gmail dot com
Target Milestone: ---
https://stackoverflow.com/questions/63432157/why-does-gcc-use-btq-in-conjunction-with-btcq-when-conditionally-set-a-bit-in-a
Basically:
void __attribute__((noinline))
cond_unset_bit(uint64_t * v, uint32_t b) {
if(__builtin_expect(!!(*v & ((1UL) << b)), 1)) {
*v ^= ((1UL) << b);
}
}
Compiles to:
cond_unset_bit(unsigned long*, unsigned int):
movq (%rdi), %rax
btq %rsi, %rax
jnc .L6
btcq %rsi, %rax
movq %rax, (%rdi)
.L6:
ret
The btq instruction is unnecessary.
cond_unset_bit(unsigned long*, unsigned int):
movq (%rdi), %rax
btcq %rsi, %rax
jnc .L6
movq %rax, (%rdi)
.L6:
ret
Accomplishes the same thing without the btq instruction.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug rtl-optimization/96632] missed-optimization with conditionally unsetting bits in memory.
2020-08-16 20:36 [Bug c/96632] New: missed-optimization with conditionally unsetting bits in memory goldstein.w.n at gmail dot com
@ 2020-08-25 10:26 ` rguenth at gcc dot gnu.org
2021-08-14 9:47 ` pinskia at gcc dot gnu.org
1 sibling, 0 replies; 3+ messages in thread
From: rguenth at gcc dot gnu.org @ 2020-08-25 10:26 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96632
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
Status|UNCONFIRMED |NEW
Last reconfirmed| |2020-08-25
Component|target |rtl-optimization
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
Confirmed. A bit tricky to do I guess. There's no representation on
GIMPLE we could use so it's left for RTL (unless we add bit
set/clear/flip-and-test internal functions).
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug rtl-optimization/96632] missed-optimization with conditionally unsetting bits in memory.
2020-08-16 20:36 [Bug c/96632] New: missed-optimization with conditionally unsetting bits in memory goldstein.w.n at gmail dot com
2020-08-25 10:26 ` [Bug rtl-optimization/96632] " rguenth at gcc dot gnu.org
@ 2021-08-14 9:47 ` pinskia at gcc dot gnu.org
1 sibling, 0 replies; 3+ messages in thread
From: pinskia at gcc dot gnu.org @ 2021-08-14 9:47 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96632
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Last reconfirmed|2020-08-25 00:00:00 |2021-8-14
Severity|normal |enhancement
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
I notice only ICC can do this.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-08-14 9:47 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-08-16 20:36 [Bug c/96632] New: missed-optimization with conditionally unsetting bits in memory goldstein.w.n at gmail dot com
2020-08-25 10:26 ` [Bug rtl-optimization/96632] " rguenth at gcc dot gnu.org
2021-08-14 9:47 ` pinskia at gcc dot gnu.org
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