From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 42D9F3987979; Wed, 30 Sep 2020 14:21:12 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 42D9F3987979 From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/96795] MVE: issue with polymorphism and integer promotion Date: Wed, 30 Sep 2020 14:21:12 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: unknown X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 30 Sep 2020 14:21:12 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D96795 --- Comment #1 from CVS Commits --- The master branch has been updated by SRINATH PARVATHANENI : https://gcc.gnu.org/g:6bd4ce64eb48a72eca300cb52773e6101d646004 commit r11-3560-g6bd4ce64eb48a72eca300cb52773e6101d646004 Author: Srinath Parvathaneni Date: Wed Sep 30 15:19:17 2020 +0100 [GCC][PATCH] arm: Fix MVE intrinsics polymorphic variants wrongly generating __ARM_undef type (pr96795). Hello, This patch fixes (PR96795) MVE intrinsic polymorphic variants vaddq, vaddq_m, vaddq_x, vcmpeqq_m, vcmpeqq, vcmpgeq_m, vcmpgeq, vcmpgtq_m, vcmpgtq, vcmpleq_m, vcmpleq, vcmpltq_m, vcmpltq, vcmpneq_m, vcmpneq, vfmaq_m, vfmaq, vfmasq_m, vfmasq, vmaxnmavq, vmaxnmavq_p, vmaxnmvq, vmaxnmvq_p, vminnmavq, vminnmavq_p, vminnmvq, vminnmvq_p, vmulq_m, vmul= q, vmulq_x, vsetq_lane, vsubq_m, vsubq and vsubq_x which are incorrectly generating __ARM_undef= and mismatching the passed floating point scalar arguments. Bootstrapped on arm-none-linux-gnueabihf and regression tested on arm-none-eabi and found no regressions. Ok for master? Ok for GCC-10 branch? Regards, Srinath. gcc/ChangeLog: 2020-09-30 Srinath Parvathaneni PR target/96795 * config/arm/arm_mve.h (__ARM_mve_coerce2): Define. (__arm_vaddq): Correct the scalar argument. (__arm_vaddq_m): Likewise. (__arm_vaddq_x): Likewise. (__arm_vcmpeqq_m): Likewise. (__arm_vcmpeqq): Likewise. (__arm_vcmpgeq_m): Likewise. (__arm_vcmpgeq): Likewise. (__arm_vcmpgtq_m): Likewise. (__arm_vcmpgtq): Likewise. (__arm_vcmpleq_m): Likewise. (__arm_vcmpleq): Likewise. (__arm_vcmpltq_m): Likewise. (__arm_vcmpltq): Likewise. (__arm_vcmpneq_m): Likewise. (__arm_vcmpneq): Likewise. (__arm_vfmaq_m): Likewise. (__arm_vfmaq): Likewise. (__arm_vfmasq_m): Likewise. (__arm_vfmasq): Likewise. (__arm_vmaxnmavq): Likewise. (__arm_vmaxnmavq_p): Likewise. (__arm_vmaxnmvq): Likewise. (__arm_vmaxnmvq_p): Likewise. (__arm_vminnmavq): Likewise. (__arm_vminnmavq_p): Likewise. (__arm_vminnmvq): Likewise. (__arm_vminnmvq_p): Likewise. (__arm_vmulq_m): Likewise. (__arm_vmulq): Likewise. (__arm_vmulq_x): Likewise. (__arm_vsetq_lane): Likewise. (__arm_vsubq_m): Likewise. (__arm_vsubq): Likewise. (__arm_vsubq_x): Likewise. gcc/testsuite/ChangeLog: PR target/96795 * gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: New Test. * gcc.target/arm/mve/intrinsics/mve_vaddq_n.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c: Likewise.=