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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/96846] [x86] Prefer xor/test/setcc over test/setcc/movzx
 sequence
Date: Sat, 29 Aug 2020 19:39:30 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D96846

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
This is something GCC is well aware of and attempts to optimize, it has sev=
eral
peephole2s, starting with the
;; Convert setcc + movzbl to xor + setcc if operands don't overlap.
comment in i386.md.
The reason why a xor isn't added in your first function is that there is no
extension in that case, usually callers will just use the 8-bit register and
then the xor would be a waste of time.
The second case isn't handled because there is no place to insert the xor t=
o,
xor modifies flags, so it can't go after the comparison that sets the flags,
and in this case can't go before either, because the register is live there=
 (it
is an operand of the comparison).  So, I guess the only way around would be=
 to
look if there is some currently unused register that could be used instead =
of
the one chosen by the register allocation, but that is not always the case.=