From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id B739838708B2; Mon, 18 Jan 2021 13:52:12 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B739838708B2 From: "stammark at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/96974] [10/11 Regression] ICE in vect_get_vector_types_for_stmt compiling for SVE Date: Mon, 18 Jan 2021 13:52:12 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: tree-optimization X-Bugzilla-Version: 10.1.1 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: stammark at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 10.3 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Jan 2021 13:52:12 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D96974 --- Comment #7 from Stam Markianos-Wright --- (In reply to rsandifo@gcc.gnu.org from comment #6) > (In reply to Stam Markianos-Wright from comment #5) > > I'm tempted to try and add a reverse: > >=20 > > || multiple_p (*stmt_vectype_out, nunits_vectype) > >=20 > > And then regtest, but I probably need to do more reading around to figu= re out > > what we really should be expecting each case! > I don't think that's right. If nunits_vectype is not a multiple > of stmt_vectype then the stmt_vectype contains (or might contain) > unused elements. The vectoriser isn't set up to work like that: > all operations are currently supposed to be full-vector operations > (possibly predicated, on SVE and AVX). >=20 > AFAICT the assert is correct and it's showing up a problem elsewhere. Cool, thank you for the info and the confirmation! I will carry on investigating to try and find the actual problem=