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From: "joseph at codesourcery dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug fortran/96983] [11 regression] ICE compiling
 gfortran.dg/pr96711.f90 starting with r11-3042
Date: Mon, 14 Sep 2020 17:06:42 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D96983

--- Comment #22 from joseph at codesourcery dot com <joseph at codesourcery=
 dot com> ---
On Fri, 11 Sep 2020, segher at gcc dot gnu.org wrote:

> > #ifndef RS6000_MODES_H
> > #define RS6000_MODES_H          1
> > #define FLOAT_PRECISION_IFmode  128
> > #define FLOAT_PRECISION_TFmode  127
> > #define FLOAT_PRECISION_KFmode  126
>=20
> Yes, this is a useful hack, but it has its own problems; the underlying
> problem *still* has to be fixed (namely, the assumption that if you have
> two floating point modes, they are ordered such that any number in one of
> the modes can be represented in the other.  In reality no such ordering
> exists: __ibm128 has values not representable in __ieee128, and vice vers=
a).
>=20
> We do have two 16 byte floating point modes, and neither is "greater" than
> the other.

Closely related: the LONG_DOUBLE_TYPE_SIZE target macro which assumes=20
"size in bits" can uniquely determine the format of long double.  In the=20
absence of hacks such as the above, LONG_DOUBLE_TYPE_SIZE needs replacing=20
by a target hook that returns the machine mode, not "size in bits" (maybe=20
a hook that covers all of float, double and long double).=