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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/97249] Missing vec_select and subreg
 optimization
Date: Mon, 12 Oct 2020 02:23:08 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97249

--- Comment #4 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Richard Biener from comment #3)
> Guess you want to figure what built the (vec_select:V8QI (V16QI)) and if
> it was appropriately simplified (and simplify_rtx would handle this case).
> In any case the vec_select is the same as (subreg:V8QI (V16QI)).

For this testcase, simplify_rtx will be omiited since it will be handle in
---
  for (i =3D 0; i < GET_RTX_LENGTH (code); i++)
    switch (*format_ptr++)
      {
      case 'e':
        if (XEXP (orig, i) !=3D NULL)
          {
            rtx result =3D cselib_expand_value_rtx_1 (XEXP (orig, i), evd,
                                                    max_depth - 1);
            if (!result)
              return NULL; <-----return here.
            if (copy)
              XEXP (copy, i) =3D result;
          }
        break;
---

So could we handle it in cselib_expand_value_rtx_1?
---
diff --git a/gcc/cselib.c b/gcc/cselib.c
index 53e9603868d..8882ac60f1e 100644
--- a/gcc/cselib.c
+++ b/gcc/cselib.c
@@ -1864,6 +1864,18 @@ cselib_expand_value_rtx_1 (rtx orig, struct
expand_value_data *evd,
        return scopy;
       }

+    /* Handle cases like
+       (vec_select:V8QI (subreg:V16QI (value:V8QI) 0)
+                       (parallel [(const_int 0) (const_int 1)
+                       (const_int 2) (const_int 3)
+                       (const_int 4) (const_int 5)
+                       (const_int 6) (const_int 7)])),
+       it should be equal to (value:V8QI).  */
+    case VEC_SELECT:
+      {
+=20=20=20=20=20=20=20
+      }
+
---=