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From: "acoplan at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa
Date: Tue, 16 Mar 2021 09:36:15 +0000 [thread overview]
Message-ID: <bug-97252-4-5UYlF3PEQS@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-97252-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252
--- Comment #2 from Alex Coplan <acoplan at gcc dot gnu.org> ---
> Unless I'm missing something, I don't think "Uxi" is a valid constraint.
> Perhaps the "Ux" constraint was intended instead?
D'oh, this is of course the union of the Ux (MVE-specific) constraint and the
"i" (general) constraint.
It seems that the problem is that we need the const_vector to get
force_const_mem'd into the constant pool, but the usual approach on AArch32
(without -mpure-code) seems to be to keep these constants around until the
arm_reorg pass runs where they then get brought into a local literal pool. Of
course, with -mpure-code, the literal pool is disabled, so we don't make this
transformation.
Looking at the same testcase on AArch64, we seem to force the const_vector out
to the constant pool in LRA instead.
Not sure what the right approach is for AArch32 here.
next prev parent reply other threads:[~2021-03-16 9:36 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 8:42 [Bug target/97252] New: " acoplan at gcc dot gnu.org
2020-09-30 14:48 ` [Bug target/97252] " acoplan at gcc dot gnu.org
2021-01-14 9:22 ` rguenth at gcc dot gnu.org
2021-03-15 11:50 ` acoplan at gcc dot gnu.org
2021-03-16 9:36 ` acoplan at gcc dot gnu.org [this message]
2021-03-16 10:45 ` acoplan at gcc dot gnu.org
2021-03-17 12:31 ` acoplan at gcc dot gnu.org
2021-03-22 14:44 ` cvs-commit at gcc dot gnu.org
2021-03-22 14:47 ` [Bug target/97252] [10 " acoplan at gcc dot gnu.org
2021-03-29 17:17 ` cvs-commit at gcc dot gnu.org
2021-03-29 17:19 ` [Bug target/97252] " acoplan at gcc dot gnu.org
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