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* [Bug target/97271] New: [ARM MVE]: Wrong code generated for scatter store with writeback intrinsics with -O2.
@ 2020-10-02 13:00 sripar01 at gcc dot gnu.org
2020-10-02 13:02 ` [Bug target/97271] " sripar01 at gcc dot gnu.org
2020-10-16 11:00 ` sripar01 at gcc dot gnu.org
0 siblings, 2 replies; 3+ messages in thread
From: sripar01 at gcc dot gnu.org @ 2020-10-02 13:00 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97271
Bug ID: 97271
Summary: [ARM MVE]: Wrong code generated for scatter store with
writeback intrinsics with -O2.
Product: gcc
Version: 11.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: sripar01 at gcc dot gnu.org
Target Milestone: ---
Created attachment 49300
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=49300&action=edit
test case
$ arm-none-eabi-gcc -v
Using built-in specs.
COLLECT_GCC=/work/gnu-work/Release/build-arm-none-eabi/install/bin/arm-none-eabi-gcc
COLLECT_LTO_WRAPPER=/work/gnu-work/Release/build-arm-none-eabi/install/libexec/gcc/arm-none-eabi/11.0.0/lto-wrapper
Target: arm-none-eabi
Configured with: /work/gnu-work/Release/src/gcc/configure
--target=arm-none-eabi
--prefix=/work/gnu-work/Release/build-arm-none-eabi/install//
--with-gmp=/work/gnu-work/Release/build-arm-none-eabi/host-tools
--with-mpfr=/work/gnu-work/Release/build-arm-none-eabi/host-tools
--with-mpc=/work/gnu-work/Release/build-arm-none-eabi/host-tools
--with-isl=/work/gnu-work/Release/build-arm-none-eabi/host-tools
--disable-shared --disable-nls --disable-threads --disable-tls
--enable-checking=yes --enable-languages=c,c++,fortran --with-newlib
--with-multilib-list=rmprofile --with-pkgversion=unknown
Thread model: single
Supported LTO compression algorithms: zlib
gcc version 11.0.0 20200930 (experimental) (unknown)
$ cat bug.c
#include "arm_mve.h"
void
foo (uint32x4_t * addr, const int offset, int32x4_t value)
{
vstrwq_scatter_base_wb_s32 (addr, 8, value);
}
$ arm-none-eabi-gcc bug.c -S -O2 -march=armv8.1-m.main+mve -mfloat-abi=hard -o
-
...
foo:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
vldrw.32 q3, [r0]
vstrw.u32 q0, [q3, #8]! ---> (A)
vldr.64 d4, .L3
vldr.64 d5, .L3+8
vldrw.32 q3, [r0]
vstrw.u32 q2, [q3, #8]! ---> (B)
bx lr
...
Current compiler wrongly generates 2 vstrw assembly instructions, where are
only one is expected.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/97271] [ARM MVE]: Wrong code generated for scatter store with writeback intrinsics with -O2.
2020-10-02 13:00 [Bug target/97271] New: [ARM MVE]: Wrong code generated for scatter store with writeback intrinsics with -O2 sripar01 at gcc dot gnu.org
@ 2020-10-02 13:02 ` sripar01 at gcc dot gnu.org
2020-10-16 11:00 ` sripar01 at gcc dot gnu.org
1 sibling, 0 replies; 3+ messages in thread
From: sripar01 at gcc dot gnu.org @ 2020-10-02 13:02 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97271
SRINATH PARVATHANENI <sripar01 at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |ASSIGNED
Ever confirmed|0 |1
Assignee|unassigned at gcc dot gnu.org |sripar01 at gcc dot gnu.org
Last reconfirmed| |2020-10-02
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/97271] [ARM MVE]: Wrong code generated for scatter store with writeback intrinsics with -O2.
2020-10-02 13:00 [Bug target/97271] New: [ARM MVE]: Wrong code generated for scatter store with writeback intrinsics with -O2 sripar01 at gcc dot gnu.org
2020-10-02 13:02 ` [Bug target/97271] " sripar01 at gcc dot gnu.org
@ 2020-10-16 11:00 ` sripar01 at gcc dot gnu.org
1 sibling, 0 replies; 3+ messages in thread
From: sripar01 at gcc dot gnu.org @ 2020-10-16 11:00 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97271
SRINATH PARVATHANENI <sripar01 at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|ASSIGNED |RESOLVED
Resolution|--- |FIXED
--- Comment #1 from SRINATH PARVATHANENI <sripar01 at gcc dot gnu.org> ---
Committed to trunk:
commit 377535881166969dba43794f298170978d797ef6
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date: Fri Oct 16 11:40:25 2020 +0100
arm: Fix wrong code generated for mve scatter store with writeback
intrinsics with -O2 (PR97271).
This patch fixes (PR97271) the wrong code-gen for mve scatter store with
writeback intrinsics with -O2.
$cat bug.c
void
foo (uint32x4_t * addr, const int offset, int32x4_t value)
{
vstrwq_scatter_base_wb_s32 (addr, 8, value);
}
$ arm-none-eabi-gcc bug.c -S -O2 -march=armv8.1-m.main+mve
-mfloat-abi=hard -o -
Without this patch:
...
foo:
vldrw.32 q3, [r0]
vstrw.u32 q0, [q3, #8]! ---> (A)
vldr.64 d4, .L3
vldr.64 d5, .L3+8
vldrw.32 q3, [r0]
vstrw.u32 q2, [q3, #8]! ---> (B)
bx lr
...
With this patch:
...
foo:
vldrw.32 q3, [r0]
vstrw.u32 q0, [q3, #8]! --> (C)
vstrw.32 q3, [r0]
bx lr
...
Without this patch 2 vstrw assembly instructions (A and B) are generated
for vstrwq_scatter_base_wb_s32
intrinsic where as fix generates only one vstrw assembly instruction (C).
Committed to GCC-10:
commit 4199cfa3d18eb99893456bd461061daa75115711
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date: Fri Oct 16 11:40:25 2020 +0100
arm: Fix wrong code generated for mve scatter store with writeback
intrinsics with -O2 (PR97271).
This patch fixes (PR97271) the wrong code-gen for mve scatter store with
writeback intrinsics with -O2.
$cat bug.c
void
foo (uint32x4_t * addr, const int offset, int32x4_t value)
{
vstrwq_scatter_base_wb_s32 (addr, 8, value);
}
$ arm-none-eabi-gcc bug.c -S -O2 -march=armv8.1-m.main+mve
-mfloat-abi=hard -o -
Without this patch:
...
foo:
vldrw.32 q3, [r0]
vstrw.u32 q0, [q3, #8]! ---> (A)
vldr.64 d4, .L3
vldr.64 d5, .L3+8
vldrw.32 q3, [r0]
vstrw.u32 q2, [q3, #8]! ---> (B)
bx lr
...
With this patch:
...
foo:
vldrw.32 q3, [r0]
vstrw.u32 q0, [q3, #8]! --> (C)
vstrw.32 q3, [r0]
bx lr
...
Without this patch 2 vstrw assembly instructions (A and B) are generated
for vstrwq_scatter_base_wb_s32
intrinsic where as fix generates only one vstrw assembly instruction (C).
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-10-16 11:00 UTC | newest]
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2020-10-02 13:00 [Bug target/97271] New: [ARM MVE]: Wrong code generated for scatter store with writeback intrinsics with -O2 sripar01 at gcc dot gnu.org
2020-10-02 13:02 ` [Bug target/97271] " sripar01 at gcc dot gnu.org
2020-10-16 11:00 ` sripar01 at gcc dot gnu.org
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