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From: "luoxhu at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/97329] POWER9 default cache and line sizes appear to be
 wrong
Date: Tue, 23 Mar 2021 06:54:39 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97329

luoxhu at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |luoxhu at gcc dot gnu.org

--- Comment #9 from luoxhu at gcc dot gnu.org ---
Yes, it seems a copy paste error for Power8 from Power7.  Is this supposed =
to
be fix by gcc-12 stage1? And any performance evaluation required?


diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 616dae35bae..34c4edae20e 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1055,7 +1055,7 @@ struct processor_costs power8_cost =3D {
   COSTS_N_INSNS (17),  /* ddiv */
   128,                 /* cache line size */
   32,                  /* l1 cache */
-  256,                 /* l2 cache */
+  512,                 /* l2 cache */
   12,                  /* prefetch streams */
   COSTS_N_INSNS (3),   /* SF->DF convert */
 };=