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From: "kip at thevertigo dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/97329] POWER9 default cache and line sizes appear to be wrong
Date: Thu, 08 Oct 2020 05:31:54 +0000	[thread overview]
Message-ID: <bug-97329-4-k9F5TB5puT@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-97329-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97329

Kip Warner <kip at thevertigo dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Version|10.2.0                      |11.0

--- Comment #1 from Kip Warner <kip at thevertigo dot com> ---
Just tested with Git head (11.0.0 20201008) and same issue:

$ gcc --version
gcc (GCC) 11.0.0 20201008 (experimental)
Copyright (C) 2020 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

$ gcc -Q -mcpu=power9 --help=param | grep -i cache
  --param=l1-cache-line-size=           128
  --param=l1-cache-size=                32
  --param=l2-cache-size=                512

$ getconf -a | grep CACHE
LEVEL1_ICACHE_SIZE                 32768
LEVEL1_ICACHE_ASSOC                32
LEVEL1_ICACHE_LINESIZE             128
LEVEL1_DCACHE_SIZE                 32768
LEVEL1_DCACHE_ASSOC                32
LEVEL1_DCACHE_LINESIZE             128
LEVEL2_CACHE_SIZE                  524288
LEVEL2_CACHE_ASSOC                 2048
LEVEL2_CACHE_LINESIZE              32
LEVEL3_CACHE_SIZE                  10485760
LEVEL3_CACHE_ASSOC                 40960
LEVEL3_CACHE_LINESIZE              32
LEVEL4_CACHE_SIZE                  0
LEVEL4_CACHE_ASSOC                 0
LEVEL4_CACHE_LINESIZE              0

$ cat /proc/cpuinfo
processor       : 0
cpu             : POWER9, altivec supported
clock           : 2933.000000MHz
revision        : 2.2 (pvr 004e 1202)

(...)

processor       : 143
cpu             : POWER9, altivec supported
clock           : 2166.000000MHz
revision        : 2.2 (pvr 004e 1202)

timebase        : 512000000
platform        : PowerNV
model           : 0000000000000000
machine         : PowerNV 0000000000000000
firmware        : OPAL
MMU             : Radix

  reply	other threads:[~2020-10-08  5:31 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-08  3:35 [Bug c/97329] New: " kip at thevertigo dot com
2020-10-08  5:31 ` kip at thevertigo dot com [this message]
2020-10-08  5:39 ` [Bug target/97329] " kip at thevertigo dot com
2020-10-08 19:41 ` segher at gcc dot gnu.org
2020-10-08 20:10 ` kip at thevertigo dot com
2020-10-08 20:11 ` segher at gcc dot gnu.org
2020-10-08 23:53 ` kip at thevertigo dot com
2020-10-08 23:53 ` kip at thevertigo dot com
2020-10-09 12:55 ` segher at gcc dot gnu.org
2021-03-23  6:54 ` luoxhu at gcc dot gnu.org
2021-03-23 22:44 ` segher at gcc dot gnu.org
2021-03-25  1:05 ` luoxhu at gcc dot gnu.org
2021-03-25  4:53 ` cvs-commit at gcc dot gnu.org
2021-03-25  5:01 ` cvs-commit at gcc dot gnu.org

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