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From: "zhroma at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/97421] aarch64: Wrong code with -O2
 -fmodulo-sched
Date: Fri, 20 Nov 2020 10:54:21 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97421

Roman Zhuykov <zhroma at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2020-11-20
                 CC|                            |abel at gcc dot gnu.org,
                   |                            |amonakov at gcc dot gnu.or=
g,
                   |                            |rguenth at gcc dot gnu.org
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW
           Assignee|unassigned at gcc dot gnu.org      |zhroma at gcc dot g=
nu.org

--- Comment #6 from Roman Zhuykov <zhroma at gcc dot gnu.org> ---
Thanks for catching this!

When modulo sched succeded and found that counter register is const-initial=
ized
in prologue it wrongly directly adjust the initization without checking that
register may be read a bit later in prologue.

I've attached the patch I'm testing.=