public inbox for gcc-bugs@sourceware.org
help / color / mirror / Atom feed
From: "clyon at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/97513] New: [11 regression] aarch64 SVE regressions since r11-3822
Date: Wed, 21 Oct 2020 09:38:01 +0000	[thread overview]
Message-ID: <bug-97513-4@http.gcc.gnu.org/bugzilla/> (raw)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97513

            Bug ID: 97513
           Summary: [11 regression] aarch64 SVE regressions since r11-3822
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: clyon at gcc dot gnu.org
  Target Milestone: ---

Since r11-3822 (g:7e7352b2ad089ea68d689f3b79d93e3ee26326f7), I have noticed
several aarch64/SVE regressions:

    gcc.target/aarch64/sve/mask_load_slp_1.c -march=armv8.2-a+sve 
scan-assembler-times \\tld1w\\t 48
    gcc.target/aarch64/sve/mask_load_slp_1.c -march=armv8.2-a+sve 
scan-assembler-times \\tst1w\\t 40
    gcc.target/aarch64/sve/slp_10.c -march=armv8.2-a+sve  scan-assembler-times
\\tld1d\\t 15
    gcc.target/aarch64/sve/slp_10.c -march=armv8.2-a+sve  scan-assembler-times
\\tst1d\\t 15
    gcc.target/aarch64/sve/slp_10.c -march=armv8.2-a+sve  scan-assembler-times
\\tuqdecd\\t 6
    gcc.target/aarch64/sve/slp_10.c -march=armv8.2-a+sve  scan-assembler-times
\\tuqdecw\\t 9
    gcc.target/aarch64/sve/slp_10.c -march=armv8.2-a+sve  scan-assembler-times
\\twhilelo\\tp[0-7]\\.d 30
    gcc.target/aarch64/sve/slp_12.c -march=armv8.2-a+sve  scan-assembler-times
\\tld1d\\t 15
    gcc.target/aarch64/sve/slp_12.c -march=armv8.2-a+sve  scan-assembler-times
\\tst1d\\t 15
    gcc.target/aarch64/sve/slp_12.c -march=armv8.2-a+sve  scan-assembler-times
\\tuqdecd\\t 6
    gcc.target/aarch64/sve/slp_12.c -march=armv8.2-a+sve  scan-assembler-times
\\tuqdecw\\t 9
    gcc.target/aarch64/sve/slp_12.c -march=armv8.2-a+sve  scan-assembler-times
\\twhilelo\\tp[0-7]\\.d 30
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tld1d\\t 6
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #25\\n 2
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #31\\n 2
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #41\\n 2
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #62\\n 2
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, x[0-9]+\\n 3
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tst1d\\t 6
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tuqdecd\\t 3
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\twhilelo\\tp[0-7]\\.d 12
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tzip1\\tz[0-9]+\\.d, z[0-9]+\\.d, z[0-9]+\\.d\\n 9
    gcc.target/aarch64/sve/slp_3.c -march=armv8.2-a+sve  scan-assembler-times
\\tzip2\\tz[0-9]+\\.d, z[0-9]+\\.d, z[0-9]+\\.d\\n 3
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-not
\\tldr
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tld1d\\t 12
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tld1rd\\tz[0-9]+\\.d,  18
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tld1w\\t 6
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #11\\n 2
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #17\\n 2
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #24\\n 2
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #37\\n 2
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #63\\n 2
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #80\\n 2
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #81\\n 2
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, #99\\n 2
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tmov\\tz[0-9]+\\.d, x[0-9]+\\n 4
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tst1d\\t 12
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tst1w\\t 6
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tuqdecd\\t 6
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tuqdecw\\t 6
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\twhilelo\\tp[0-7]\\.d 24
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\twhilelo\\tp[0-7]\\.s 12
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tzip1\\tz[0-9]+\\.d, z[0-9]+\\.d, z[0-9]+\\.d\\n 33
    gcc.target/aarch64/sve/slp_4.c -march=armv8.2-a+sve  scan-assembler-times
\\tzip2\\tz[0-9]+\\.d, z[0-9]+\\.d, z[0-9]+\\.d\\n 15
    gcc.target/aarch64/sve/slp_8.c -march=armv8.2-a+sve  scan-assembler-times
\\tld1d\\t 9
    gcc.target/aarch64/sve/slp_8.c -march=armv8.2-a+sve  scan-assembler-times
\\tst1d\\t 9
    gcc.target/aarch64/sve/slp_8.c -march=armv8.2-a+sve  scan-assembler-times
\\tzip1\\tp[0-7]\\.d 3
    gcc.target/aarch64/sve/slp_8.c -march=armv8.2-a+sve  scan-assembler-times
\\tzip2\\tp[0-7]\\.d 3
    gcc.target/aarch64/sve/slp_perm_1.c -march=armv8.2-a+sve 
scan-assembler-times \\trevb\\tz[0-9]+\\.d, p[0-7]/m, z[0-9]+\\.d\\n 1
    gcc.target/aarch64/sve/slp_perm_2.c -march=armv8.2-a+sve 
scan-assembler-times \\trevb\\tz[0-9]+\\.s, p[0-7]/m, z[0-9]+\\.s\\n 1
    gcc.target/aarch64/sve/slp_perm_3.c -march=armv8.2-a+sve 
scan-assembler-times \\trevb\\tz[0-9]+\\.h, p[0-7]/m, z[0-9]+\\.h\\n 1
    gcc.target/aarch64/sve/slp_perm_6.c -march=armv8.2-a+sve 
scan-assembler-times \\ttbl\\tz[0-9]+\\.b, z[0-9]+\\.b, z[0-9]+\\.b\\n 1

             reply	other threads:[~2020-10-21  9:38 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-21  9:38 clyon at gcc dot gnu.org [this message]
2020-10-21 10:32 ` [Bug target/97513] " rguenth at gcc dot gnu.org
2020-10-21 13:14 ` acoplan at gcc dot gnu.org
2020-10-21 13:17 ` clyon at gcc dot gnu.org
2020-11-19 18:02 ` rsandifo at gcc dot gnu.org
2020-11-19 19:56 ` clyon at gcc dot gnu.org
2021-01-14  9:30 ` rguenth at gcc dot gnu.org
2021-03-09 14:26 ` rguenth at gcc dot gnu.org
2021-03-17 13:13 ` jakub at gcc dot gnu.org
2021-04-01 16:11 ` rsandifo at gcc dot gnu.org
2021-04-07 14:22 ` cvs-commit at gcc dot gnu.org
2021-04-08 10:21 ` jakub at gcc dot gnu.org
2021-04-09 11:45 ` rsandifo at gcc dot gnu.org

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=bug-97513-4@http.gcc.gnu.org/bugzilla/ \
    --to=gcc-bugzilla@gcc.gnu.org \
    --cc=gcc-bugs@gcc.gnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).