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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/97701] [10/11 Regression] aarch64: ICE in
 extract_constrain_insn since r10-4447-g095f78c6
Date: Tue, 26 Jan 2021 11:25:55 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97701

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |ktkachov at gcc dot gnu.or=
g,
                   |                            |rsandifo at gcc dot gnu.or=
g,
                   |                            |vmakarov at gcc dot gnu.org

--- Comment #6 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I can still reproduce with current trunk and it seems it was latent before =
and
is a ra or backend bug.
The problematic insn is created during LRA, and first is:
(insn 2616 2615 0 (set (reg:DI 1467)
        (lo_sum:DI (reg:DI 1468)
            (symbol_ref/u:DI ("*.LC0") [flags 0x82]))) -1
     (nil))
which is fine for:
        (set (match_operand:DI 0 ("register_operand") ("=3Dr"))
            (lo_sum:DI (match_operand:DI 1 ("register_operand") ("r"))
                (match_operand 2 ("aarch64_valid_symref") ("S"))))
insn, but later on LRA changes the destination register to:
(insn 2616 2615 2617 5 (set (reg:DI 32 v0 [1467])
        (lo_sum:DI (reg:DI 1468)
            (symbol_ref/u:DI ("*.LC0") [flags 0x82]))) 1007 {add_losym_di}
     (expr_list:REG_DEAD (reg:DI 1468)
        (nil)))
and that doesn't match anymore, as v0 register is not GENERAL_REGS.=