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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug tree-optimization/97747] [9/10/11/12 Regression] missed combine
 opt with logical ops after zero extended load
Date: Fri, 04 Feb 2022 21:17:59 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97747

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2022-02-04
     Ever confirmed|0                           |1
      Known to fail|                            |8.2.0
            Summary|missed combine opt with     |[9/10/11/12 Regression]
                   |logical ops after zero      |missed combine opt with
                   |extended load               |logical ops after zero
                   |                            |extended load
      Known to work|                            |7.5.0
             Status|UNCONFIRMED                 |ASSIGNED
          Component|rtl-optimization            |tree-optimization

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Mine for GCC 13, bitfield lowering.

Note the store merging pass also messes up and creates:
  _5 =3D _4 & 250;
  _6 =3D _5 | 5;

Which can be optimized to just:
_6 =3D _4 | 5;

I might look at store merging first.

Note I think this might be a regression in code generation (store merging
caused the regressions).

GCC 7.5.0 produced:
        ldr     r2, .L3
        ldrb    r3, [r2]        @ zero_extendqisi2
        orr     r3, r3, #5
        strb    r3, [r2]
        bx      lr

While GCC 8.2.0 produced:
        ldr     r2, .L3
        ldrb    r3, [r2]        @ zero_extendqisi2
        bic     r3, r3, #5
        orr     r3, r3, #5
        strb    r3, [r2]
        bx      lr=