From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id E7F953858032; Tue, 14 Nov 2023 12:20:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E7F953858032 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1699964450; bh=dljuAoErfSpvYkexJfHG9KD+3gnZXcUyzT8e6VAuE2w=; h=From:To:Subject:Date:In-Reply-To:References:From; b=Sn+9UFHNgv+DEgjetUNkYmHtfBao92CIWWaxRb5YSgW6v2fg6n+LMv5UOx9lYGVhk bOVlNjefmvj/KveuXNV187etLMvTHDcGu0hPKktxHCj2hV0foUl1HhjFUDBsfeAKG0 6k8wDCBiR82Vx9d/SpTH7mLB245BpHuVKvgjGuPU= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/97756] [11/12/13/14 Regression] Inefficient handling of 128-bit arguments Date: Tue, 14 Nov 2023 12:20:49 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 11.0 X-Bugzilla-Keywords: missed-optimization, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 11.5 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97756 --- Comment #16 from CVS Commits --- The master branch has been updated by Jakub Jelinek : https://gcc.gnu.org/g:aad65285a1c681feb9fc5b041c86d841b24c3d2a commit r14-5442-gaad65285a1c681feb9fc5b041c86d841b24c3d2a Author: Jakub Jelinek Date: Tue Nov 14 13:19:48 2023 +0100 i386: Fix up 3_doubleword_lowpart [PR112523] On Sun, Nov 12, 2023 at 09:03:42PM -0000, Roger Sayle wrote: > This patch improves register pressure during reload, inspired by PR 97756. > Normally, a double-word right-shift by a constant produces a double-w= ord > result, the highpart of which is dead when followed by a truncation. > The dead code calculating the high part gets cleaned up post-reload, = so > the issue isn't normally visible, except for the increased register > pressure during reload, sometimes leading to odd register assignments. > Providing a post-reload splitter, which clobbers a single wordmode > result register instead of a doubleword result register, helps (a bit= ). Unfortunately this broke bootstrap on i686-linux, broke all ACATS tests on x86_64-linux as well as miscompiled e.g. __floattisf in libgcc there as well. The bug is that shrd{l,q} instruction expects the low part of the input to be the same register as the output, rather than the high part as the patch implemented. split_double_mode (mode, &operands[1], 1, &operands[1], &operands[3]); sets operands[1] to the lo_half and operands[3] to the hi_half, so if operands[0] is not the same register as operands[1] (rather than [3]) a= fter RA, we should during splitting move operands[1] into operands[0]. Your testcase: > #define MASK60 ((1ul << 60) - 1) > unsigned long foo (__uint128_t n) > { > unsigned long a =3D n & MASK60; > unsigned long b =3D (n >> 60); > b =3D b & MASK60; > unsigned long c =3D (n >> 120); > return a+b+c; > } still has the same number of instructions. Bootstrapped/regtested on x86_64-linux (where it e.g. turns =3D=3D=3D acats Summary =3D=3D=3D -# of unexpected failures 2328 +# of expected passes 2328 +# of unexpected failures 0 and fixes gcc.dg/torture/fp-int-convert-*timode.c FAILs as well) and i686-linux (where it previously didn't bootstrap, but compared to Friday evening's bootstrap the testresults are ok). 2023-11-14 Jakub Jelinek PR target/112523 PR ada/112514 * config/i386/i386.md (3_doubleword_lowpart): Move operands[1] aka low part of input rather than operands[3] aka h= igh part of input to output if not the same register.=