From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 4DBF4395CCD7; Fri, 20 Nov 2020 10:26:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4DBF4395CCD7 From: "ubizjak at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/97873] Failure to optimize abs optimally (at least one completely useless instruction on x86) Date: Fri, 20 Nov 2020 10:26:14 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 11.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: ubizjak at gmail dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 20 Nov 2020 10:26:14 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D97873 --- Comment #9 from Uro=C5=A1 Bizjak --- Fixed by: commit fdace7584056de2f63bde2e3087f26beb6b0f97d Author: Uros Bizjak Date: Fri Nov 20 10:26:34 2020 +0100 i386: Optimize abs expansion [PR97873] The patch introduces absM named pattern to generate optimal insn sequen= ce for CMOVE_TARGET targets. Currently, the expansion goes through neg+max optabs, and the following code is generated: movl %edi, %eax negl %eax cmpl %edi, %eax cmovl %edi, %eax This sequence is unoptimal in two ways. a) The compare instruction is not needed, since NEG insn sets the sign flag based on the result. The CMOV can use sign flag to select between negated and original value: movl %edi, %eax negl %eax cmovs %edi, %eax b) On some targets, CMOV is undesirable due to its performance issues. In addition to TARGET_EXPAND_ABS bypass, the patch introduces STV conversion of abs RTX to use PABS SSE insn: vmovd %edi, %xmm0 vpabsd %xmm0, %xmm0 vmovd %xmm0, %eax The patch changes compare mode of NEG instruction to CCGOCmode, which is the same mode as the mode of SUB instruction. IOW, sign bit becomes usable. Also, the mode iterator of 3 pattern is changed to SWI48x instead of SWI248. The purpose of maxmin expander is to prepare max/min RTX for STV to eventually convert them to SSE PMAX/PMIN instructions, in order to *avoid* CMOV insns with general registers. 2020-11-20 Uro=C5=A1 Bizjak gcc/ PR target/97873 * config/i386/i386.md (*neg2_2): Rename from "*neg2_cmpz". Use CCGOCmode instead of CCZmode. (*negsi2_zext): Rename from *negsi2_cmpz_zext. Use CCGOCmode instead of CCZmode. (*neg_ccc_1): New insn pattern. (*neg2_doubleword): Use *neg_ccc_1. (abs2): Add FLAGS_REG clobber. Use TARGET_CMOVE insn predicate. (*abs2_1): New insn_and_split pattern. (*absdi2_doubleword): Ditto. (3): Use SWI48x mode iterator. (*3): Use SWI48 mode iterator. * config/i386/i386-features.c (general_scalar_chain::compute_convert_gain): Handle ABS code. (general_scalar_chain::convert_insn): Ditto. (general_scalar_to_vector_candidate_p): Ditto. gcc/testsuite/ PR target/97873 * gcc.target/i386/pr97873.c: New test. * gcc.target/i386/pr97873-1.c: New test.=